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IC_PRJ/sim/verdiLog/novas_sim.log

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Invoking simulator...
Verdi>simv -sml=verdi +fsdb+gate=off -ucli2Proc -ucli
*Verdi* Loading libsscore_vcs201809.so
FSDB Dumper for VCS, Release Verdi_O-2018.09-SP2, Linux x86_64/64bit, 02/21/2019
(C) 1996 - 2019 by Synopsys, Inc.
*Verdi* : Create FSDB file '/home/ICer/ic_prjs/mc/IC_PRJ/sim/inter.fsdb'
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*Verdi* : Flush all FSDB Files at 0 ps.
*Verdi* : Enable RPC Server(26345)
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Chronologic VCS simulator copyright 1991-2018
Contains Synopsys proprietary information.
Compiler version O-2018.09-1_Full64; Runtime version O-2018.09-1_Full64; Aug 6 22:32 2025
Verdi>fsdbDumpvarsByFile {/home/ICer/ic_prjs/mc/IC_PRJ/sim/verdiLog/.tbsimDump_var_file};fsdbDumpflush
*Verdi* : Begin dumping the scopes by file (/home/ICer/ic_prjs/mc/IC_PRJ/sim/verdiLog/.tbsimDump_var_file).
*Verdi* : End of dumping.
*Verdi* : Flush all FSDB Files at 0 ps.
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*Verdi* : Flush all FSDB Files at 0 ps.
Verdi>run
*Verdi* : Begin traversing the scope (tb_rchannel), layer (0).
*Verdi* : Enable +all dumping.
*Verdi* : End of traversing.
$finish called from file "../tb/tb_rchannel.v", line 64.
$finish at simulation time 365000
Simulation complete, time is 365000 ps.
tb_rchannel.v, 1 : module tb_rchannel;
V C S S i m u l a t i o n R e p o r t
Time: 365000 ps
CPU Time: 0.250 seconds; Data structure size: 0.0Mb
Wed Aug 6 22:41:15 2025
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debExit