v1.0
This commit is contained in:
Core_kingdom
673
sim/simv.daidir/vcselab_master_hsim_elabout.db
Normal file
673
sim/simv.daidir/vcselab_master_hsim_elabout.db
Normal file
@@ -0,0 +1,673 @@
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hsDirType 1
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fHsimDesignHasDebugNodes 61
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||||
fNSParam 1024
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fLargeSizeSdfTest 0
|
||||
fHsimDelayGateMbme 0
|
||||
fNoMergeDelays 0
|
||||
fHsimAllMtmPat 0
|
||||
fHsimCertRaptMode 0
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||||
fSharedMasterElab 0
|
||||
hsimLevelizeDone 1
|
||||
fHsimCompressDiag 1
|
||||
fHsimPowerOpt 0
|
||||
fLoopReportElab 0
|
||||
fHsimRtl 0
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||||
fHsimCbkOptVec 1
|
||||
fHsimDynamicCcnHeur 1
|
||||
fHsimPvcs 0
|
||||
fHsimPvcsCcn 0
|
||||
fHsimOldLdr 0
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||||
fHsimSingleDB 1
|
||||
uVfsGcLimit 50
|
||||
fHsimCompatSched 0
|
||||
fHsimCompatOrder 0
|
||||
fHsimTransUsingdoMpd32 0
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||||
fHsimDynamicElabForGates 1
|
||||
fHsimDynamicElabForVectors 0
|
||||
fHsimDynamicElabForVectorsAlways 0
|
||||
fHsimDynamicElabForVectorsMinputs 0
|
||||
fHsimDeferForceSelTillReElab 0
|
||||
fHsimModByModElab 1
|
||||
fSvNettRealResType 0
|
||||
fHsimExprID 1
|
||||
fHsimSequdpon 0
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||||
fHsimDatapinOpt 0
|
||||
fHsimExprPrune 0
|
||||
fHsimMimoGate 0
|
||||
fHsimNewChangeCheckFrankch 1
|
||||
fHsimNoSched0Front 0
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||||
fHsimNoSched0FrontForMd 1
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||||
fHsimScalReg 0
|
||||
fHsimNtbVl 0
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||||
fHsimICTimeStamp 0
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||||
fHsimICDiag 0
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||||
fHsimNewCSDF 1
|
||||
vcselabIncrMode 2
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||||
fHsimMPPackDelay 0
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||||
fHsimMultDriver 0
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||||
fHsimPart 0
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||||
fHsimPrlComp 0
|
||||
fHsimPartTest 0
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||||
fHsimTestChangeCheck 0
|
||||
fHsimTestFlatNodeOrder 0
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||||
fHsimTestNState 0
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||||
fHsimPartDebug 0
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||||
fHsimPartFlags 0
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||||
fHsimOdeSched0 0
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||||
fHsimNewRootSig 1
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||||
fHsimDisableRootSigModeOpt 0
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||||
fHsimTestRootSigModeOpt 0
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||||
fHsimIncrWriteOnce 0
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||||
fHsimUnifInterfaceFlow 1
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||||
fHsimUnifInterfaceFlowDiag 0
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||||
fHsimUnifInterfaceFlowXmrDiag 0
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||||
fHsimUnifInterfaceMultiDrvChk 1
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||||
fHsimXVirForGenerateScope 0
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||||
fHsimCongruencyIntTestI 0
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||||
fHsimCongruencySVA 0
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||||
fHsimCongruencySVADbg 0
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||||
fHsimCongruencyLatchEdgeFix 0
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||||
fHsimCongruencyFlopEdgeFix 0
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||||
fHsimCongruencyXprop 0
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||||
fHsimCongruencyXpropFix 0
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||||
fHsimCongruencyXpropDbsEdge 0
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||||
fHsimCongruencyResetRecoveryDbs 0
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||||
fHsimCongruencyClockControlDiag 0
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||||
fHsimCongruencySampleUpdate 0
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||||
fHsimCongruencyFFDbsFix 0
|
||||
fHsimCongruency 0
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||||
fHsimCongruencySlave 0
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||||
fHsimCongruencyCombinedLoads 0
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||||
fHsimCongruencyFGP 0
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||||
fHsimDeraceClockDataUdp 0
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||||
fHsimDeraceClockDataLERUpdate 0
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||||
fHsimCongruencyPC 0
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||||
fHsimCongruencyPCInl 0
|
||||
fHsimCongruencyPCDbg 0
|
||||
fHsimCongruencyPCNoReuse 0
|
||||
fHsimCongruencyDumpHier 0
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||||
fHsimCongruencyResolution 0
|
||||
fHsimCongruencyEveBus 0
|
||||
fHsimHcExpr 0
|
||||
fHsCgOptModOpt 0
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||||
fHsCgOptSlowProp 0
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||||
fHsimCcnOpt 1
|
||||
fHsimCcnOpt2 1
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||||
fHsimCcnOpt3 0
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||||
fHsimSmdMap 0
|
||||
fHsimSmdDiag 0
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||||
fHsimSmdSimProf 0
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||||
fHsimSgdDiag 0
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||||
fHsimRtDiagLite 0
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||||
fHsimRtDiagLiteCevent 100
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||||
fHsimRtDiag 0
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||||
fHsimSkRtDiag 0
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||||
fHsimDDBSRtdiag 0
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||||
fHsimDbg 0
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||||
fHsimCompWithGates 0
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||||
fHsimMdbDebugOpt 0
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||||
fHsimMdbDebugOptP1 0
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||||
fHsimMdbDebugOptP2 0
|
||||
fHsimMdbPruneOpt 1
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||||
fHsimMdbMemOpt 0
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||||
hsimRandValue 0
|
||||
fHsimSimMemProfile 0
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||||
fHsimSimTimeProfile 0
|
||||
fHsimElabMemProfile 0
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||||
fHsimElabTimeProfile 0
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||||
fHsimElabMemNodesProfile 0
|
||||
fHsimElabMemAllNodesProfile 0
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||||
fHsimDisableVpdGatesProfile 0
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||||
fHsimFileProfile 0
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||||
fHsimCountProfile 0
|
||||
fHsimXmrDefault 1
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||||
fHsimFuseWireAndReg 0
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||||
fHsimFuseSelfDrvLogic 0
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||||
fHsimFuseProcess 0
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||||
fHsimAllXmrs 1
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||||
fHsimMvsimDb 0
|
||||
fHsimTaskFuncXmrs 0
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||||
fHsimTaskFuncXmrsDbg 0
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||||
fHsimAllTaskFuncXmrs 0
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||||
fHsimPageArray 16383
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||||
fHsimPageControls 16383
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||||
hsDfsNodePageElems 0
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||||
hsNodePageElems 0
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||||
hsFlatNodePageElems 0
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||||
hsGateMapPageElems 0
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||||
hsGateOffsetPageElems 0
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||||
hsGateInputOffsetPageElems 0
|
||||
hsDbsOffsetPageElems 0
|
||||
hsMinPulseWidthPageElems 0
|
||||
hsNodeUpPatternPageElems 0
|
||||
hsNodeDownPatternPageElems 0
|
||||
hsNodeUpOffsetPageElems 0
|
||||
hsNodeEblkOffsetPageElems 0
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||||
hsNodeDownOffsetPageElems 0
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||||
hsNodeUpdateOffsetPageElems 0
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||||
hsSdfOffsetPageElems 0
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||||
fHsimPageAllLevelData 0
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||||
fHsimAggrCg 0
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||||
fHsimViWire 1
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||||
fHsimPcCbOpt 1
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||||
fHsimAmsTunneling 0
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||||
fHsimAmsTunnelingDiag 0
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||||
fHsimScUpwardXmrNoSplit 1
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||||
fHsimOrigNdbViewOnly 0
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||||
fHsimVcsInterface 1
|
||||
fHsimVcsInterfaceAlias 1
|
||||
fHsimSVTypesIntf 1
|
||||
fUnifiedAssertCtrlDiag 0
|
||||
fHsimEnable2StateScal 0
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||||
fHsimDisable2StateScalIbn 0
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||||
fHsimVcsInterfaceAliasDbg 0
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||||
fHsimVcsInterfaceDbg 0
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||||
fHsimVcsVirtIntfDbg 0
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||||
fHsimVcsAllIntfVarMem 0
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||||
fHsimCheckVIDynLoadOffsets 0
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||||
fHsimModInline 1
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||||
fHsimModInlineDbg 0
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||||
fHsimPCDrvLoadDbg 0
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||||
fHsimDrvChk 1
|
||||
fHsimRtlProcessingNeeded 0
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||||
fHsimGrpByGrpElab 0
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||||
fHsimGrpByGrpElabMaster 0
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||||
fHsimNoParentSplitPC 0
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||||
fHsimNusymMode 0
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||||
fHsimOneIntfPart 0
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||||
fHsimCompressInSingleDb 2
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||||
fHsimCompressFlatDb 0
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||||
fHsimNoTime0Sched 1
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||||
fHsimMdbVectorizeInstances 0
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||||
fHsimMdbSplitGates 0
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||||
fHsimDeleteInstances 0
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||||
fHsimUserDeleteInstances 0
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||||
fHsimDeleteGdb 0
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||||
fHsimDeleteInstancesMdb 0
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||||
fHsimShortInstMap 0
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||||
fHsimMdbVectorizationDump 0
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||||
fHsimScanVectorize 0
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||||
fHsimParallelScanVectorize 0
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||||
noInstsInVectorization 0
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||||
cHsimNonReplicatedInstances 0
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||||
fHsimScanRaptor 0
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||||
fHsimConfigFileCount 0
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||||
fHsimVectorConstProp 0
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||||
fHsimPromoteParam 0
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||||
fHsimNoVecInRaptor 0
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||||
fRaptorDumpVal 0
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||||
fRaptorVecNodes 0
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||||
fRaptorVecNodes2 0
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||||
fRaptorNonVecNodes 0
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||||
fRaptorBdrNodes 0
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||||
fRaptorVecGates 0
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||||
fRaptorNonVecGates 0
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||||
fRaptorTotalNodesBeforeVect 0
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||||
fRaptorTotalGatesBeforeVect 0
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||||
fHsimCountRaptorBits 0
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||||
fHsimNewEvcd 1
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||||
fHsimNewEvcdMX 0
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||||
fHsimNewEvcdVecRoot 1
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||||
fHsimNewEvcdForce 1
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||||
fHsimNewEvcdTest 0
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||||
fHsimNewEvcdObnDrv 1
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||||
fHsimNewEvcdW 1
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||||
fHsimNewEvcdWTest 0
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||||
fHsimEvcdDbgFlags 0
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||||
fHsimDumpOffsetData 1
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||||
fFlopGlitchDetect 0
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||||
fHsimClkGlitch 0
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||||
fHsimGlitchDumpOnce 0
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||||
fHsimDynamicElab 1
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||||
fHsimCgVectors2Debug 0
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||||
fHsimOdeDynElab 0
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||||
fHsimOdeDynElabDiag 0
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||||
fHsimOdeSeqUdp 0
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||||
fHsimOdeSeqUdpXEdge 0
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||||
fHsimOdeSeqUdpDbg 0
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||||
fHsimOdeRmvSched0 0
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||||
fHsimAllLevelSame 0
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||||
fHsimRtlDbsList 0
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||||
fHsimPePort 0
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||||
fHsimPeXmr 0
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||||
fHsimPePortDiag 0
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||||
fHsimUdpDbs 0
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||||
fHsimRemoveDbgCaps 0
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||||
fFsdbGateOnepassTraverse 0
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||||
fHsimAllowVecGateInVpd 1
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||||
fHsimAllowAllVecGateInVpd 0
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||||
fHsimAllowUdpInVpd 1
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||||
fHsimAllowAlwaysCombInVpd 1
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||||
fHsimAllowAlwaysCombCmpDvcSimv 0
|
||||
fHsimAllowAlwaysCombDbg 0
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||||
fHsimMakeAllP2SPrimary 0
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||||
fHsimMakeAllSeqPrimary 0
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||||
fHsimNoCcnDump 0
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||||
fHsimFsdbProfDiag 0
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||||
fVpdSeqGate 0
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||||
fVpdHsIntVecGate 0
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||||
fVpdHsCmplxVecGate 0
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||||
fVpdHsVecGateDiags 0
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||||
fSeqGateCodePatch 0
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||||
fVpdLongFaninOpt 0
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||||
fVpdSeqLongFaninOpt 0
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||||
fVpdNoLoopDetect 0
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||||
fVpdNoSeqLoopDetect 0
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||||
fVpdOptAllowConstDriver 0
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||||
fVpdAllowCellReconstruction 0
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||||
fVpdRtlForSharedLib 0
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||||
fHsimVpdOptGate 1
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||||
fHsimVpdOptDelay 0
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||||
fHsimVpdOptMPDelay 0
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||||
fHsimCbkOptDiag 0
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||||
fHsimSK 0
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||||
fHsimSharedKernel 1
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||||
fHsimOnepass 0
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||||
fHsimStitchNew 0
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||||
fHsimParallelLevelize 0
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||||
fHsimParallelLevelizeDbg 0
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||||
fHsimSeqUdpDbsByteArray 0
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||||
fHsimCoLocate 0
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||||
fHsimSeqUdpEblkOpt 0
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||||
fHsimSeqUdpEblkOptDiag 0
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||||
fHsimGateInputAndDbsOffsetsOpt 1
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||||
fHsimUdpDynElab 0
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||||
fHsimCompressData 4
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||||
fHsimIgnoreZForDfuse 1
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||||
fHsimIgnoreDifferentCaps 0
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||||
fHandleGlitchQC 1
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||||
fGlitchDetectForAllRtlLoads 0
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||||
fHsimFuseConstDriversOpt 1
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||||
fHsimIgnoreReElab 0
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||||
fHsimFuseMultiDrivers 0
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||||
fHsimNoSched0Reg 0
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||||
fHsimAmsFusionEnabled 0
|
||||
fHsimRtlDbs 0
|
||||
fHsimWakeupId 0
|
||||
fHsimPassiveIbn 0
|
||||
fHsimBcOpt 1
|
||||
fHsimCertitude 0
|
||||
fHsimCertRapAutoTest 0
|
||||
fHsimRaceDetect 0
|
||||
fCheckTcCond 0
|
||||
fHsimScanOptRelaxDbg 0
|
||||
fHsimScanOptRelaxDbgDynamic 0
|
||||
fHsimScanOptRelaxDbgDynamicPli 0
|
||||
fHsimScanOptRelaxDbgDiag 0
|
||||
fHsimScanOptRelaxDbgDiagHi 0
|
||||
fHsimScanOptNoErrorOnPliAccess 0
|
||||
fHsimScanOptTiming 0
|
||||
fRelaxIbnSchedCheck 0
|
||||
fHsimScanOptNoDumpCombo 0
|
||||
fHsimScanOptPrintSwitchState 0
|
||||
fHsimScanOptSelectiveSwitchOn 0
|
||||
fHsimScanOptSingleSEPliOpt 1
|
||||
fHsimScanOptDesignHasDebugAccessOnly 0
|
||||
fHsimScanOptPrintPcode 0
|
||||
fHsimScanDbgPerf 0
|
||||
fHsimNoStitchMap 0
|
||||
fHsimUnifiedModName 0
|
||||
fHsimCbkMemOptDebug 0
|
||||
fHsimMasterModuleOnly 0
|
||||
fHsimMdbOptimizeSelects 0
|
||||
fHsimMdbScalarizePorts 0
|
||||
fHsimMdbOptimizeSelectsHeuristic 1
|
||||
fHsimMdb1006Partition 0
|
||||
fHsimVectorPgate 0
|
||||
fHsimNoHs 0
|
||||
fHsimXmrPartition 0
|
||||
fHsimNewPartition 0
|
||||
fHsimElabPart 0
|
||||
fHsimNewPartTHold 0
|
||||
fHsimParitionCellInstNum 1000
|
||||
fHsimParitionCellNodeNum 1000
|
||||
fHsimParitionCellXMRNum 1000
|
||||
fHsimNewPartCutSingleInstLimit 268435455
|
||||
fHsimElabModDistNum 0
|
||||
fHsimNewPartAutoUpperLimit 0
|
||||
fHsimPCPortPartition 0
|
||||
fHsimPortPartition 0
|
||||
fHsimDumpMdb 0
|
||||
fHsimElabDiag 0
|
||||
fHsimSimpCollect 0
|
||||
fHsimPcodeDiag 0
|
||||
fHsimFastelab 0
|
||||
fHsimMacroOpt 0
|
||||
fHsimSkipOpt 0
|
||||
fHsimSkipOptFanoutlimit 0
|
||||
fHsimSkipOptRootlimit 0
|
||||
fHsimFuseDelayChains 0
|
||||
fFusempchainsFanoutlimit 0
|
||||
fFusempchainsDiagCount 0
|
||||
fHsimCgVectorGates 0
|
||||
fHsimCgVectorGates1 0
|
||||
fHsimCgVectorGates2 0
|
||||
fHsimCgVectorGatesNoReElab 0
|
||||
fHsimCgScalarGates 0
|
||||
fHsimCgScalarGatesExpr 0
|
||||
fHsimCgScalarGatesLut 0
|
||||
fHsimCgRtl 1
|
||||
fHsimCgRtlFilter 0
|
||||
fHsimCgRtlDebug 0
|
||||
fHsimCgRtlSize 15
|
||||
fHsimNewCgRt 0
|
||||
fHsimNewCgMPRt 0
|
||||
fHsimNewCgMPRetain 0
|
||||
fHsimCgRtlInfra 1
|
||||
fHsimGlueOpt 0
|
||||
fHsimPGatePatchOpt 0
|
||||
fHsimCgNoPic 0
|
||||
fHsimElabModCg 0
|
||||
fPossibleNullChecks 0
|
||||
fHsimProcessNoSplit 1
|
||||
fHsimMdbOptInSchedDelta 0
|
||||
fScaleTimeValue 0
|
||||
fDebugTimeScale 0
|
||||
fPartCompSDF 0
|
||||
fHsimNbaGate 1
|
||||
fDumpSDFBasedMod 1
|
||||
fOptimisticNtcSolver 0
|
||||
fHsimAllMtm 0
|
||||
fHsimAllMtmPat 0
|
||||
fHsimSdgOptEnable 0
|
||||
fHsimSVTypesRefPorts 0
|
||||
fHsimGrpByGrpElabIncr 0
|
||||
fHsimMarkRefereeInVcsElab 0
|
||||
fHsimStreamOpFix 1
|
||||
fHsimInterface 0
|
||||
fHsimMxWrapOpt 0
|
||||
fHsimMxTopBdryOpt 0
|
||||
fHsimClasses 0
|
||||
fHsimAggressiveDce 0
|
||||
fHsimDceDebug 1
|
||||
fHsimDceDebugUseHeuristics 1
|
||||
fHsimMdbNewDebugOpt 0
|
||||
fHsimMdbNewDebugOptExitOnError 1
|
||||
fHsimNewDebugOptMemDiag 0
|
||||
hsGlobalVerboseLevel 0
|
||||
fHsimMdbVectorConstProp 1
|
||||
fHsimEnableSeqUdpWrite 1
|
||||
fHsimDumpMDBOnlyForSeqUdp 0
|
||||
fHsimInitRegRandom 0
|
||||
fHsimInitRegRandomVcs 1
|
||||
fEnableNewFinalStrHash 0
|
||||
fEnableNewAssert 1
|
||||
fRunDbgDmma 0
|
||||
fAssrtCtrlSigChk 1
|
||||
fCheckSigValidity 0
|
||||
fUniqPriToAstRewrite 0
|
||||
fUniqPriToAstCtrl 0
|
||||
fAssertcontrolUniqPriNewImpl 0
|
||||
fRTLoopDectEna 0
|
||||
fCmplLoopDectEna 0
|
||||
fHsimMopFlow 1
|
||||
fUCaseLabelCtrl 0
|
||||
fUniSolRtSvaEna 1
|
||||
fUniSolSvaEna 1
|
||||
fXpropRtCtrlCallerOnly 0
|
||||
fHsimRaptorPart 0
|
||||
fHsimEnableDbsMemOpt 1
|
||||
fHsimDebugDbsMemOpt 0
|
||||
fHsimRenPart 0
|
||||
fHsimShortElabInsts 0
|
||||
fHsimXmrAllWires 0
|
||||
fHsimXmrDiag 0
|
||||
fHsimXmrPort 0
|
||||
fHsimFalcon 1
|
||||
fHsimGenForProfile 0
|
||||
fCompressSDF 0
|
||||
fDlpSvtbExclElab 0
|
||||
fHsimGates1209 0
|
||||
fHsimCgRtlNoShareSmd 0
|
||||
fHsimGenForErSum 0
|
||||
fVpdOpt 1
|
||||
fHsimMdbCell 0
|
||||
fHsimCellDebug 0
|
||||
fHsimNoPeekInMdbCell 0
|
||||
igetOpcodeSmdPtrLayoutId -1
|
||||
igetFieldSmdPtr -1
|
||||
fDebugDump 1
|
||||
fHsimOrigNodeNames 0
|
||||
fHsimCgVectors2VOnly 0
|
||||
fHsimMdbDeltaGate 0
|
||||
fHsimMdbVecDeltaGate 1
|
||||
fHsimVpdOptVfsDB 1
|
||||
fHsimMdbPruneVpdGates 1
|
||||
fHsimPcPe 0
|
||||
fHsimVpdGateOnlyFlag 1
|
||||
fHsimMxConnFrc 0
|
||||
fHsimNewForceCbkVec 0
|
||||
fHsimNewForceCbkVecDiag 0
|
||||
fHsimMdbReplaceVpdHighConn 1
|
||||
fHsimVpdOptSVTypes 1
|
||||
fHsHasPeUpXmr 0
|
||||
fHsimCompactVpdFn 1
|
||||
fHsimPIP 0
|
||||
fHsimRTLoopDectOrgName 0
|
||||
fHsimVpdOptPC 0
|
||||
fHsimFusePeXmrFo 0
|
||||
fHsimXmrSched 0
|
||||
fHsimNoMdg 0
|
||||
fHsimVectorGates 0
|
||||
fHsimRtlLite 0
|
||||
fHsimMdbcgLut 0
|
||||
fHsimMdbcgSelective 0
|
||||
fHsimVcselabGates 0
|
||||
fHsimMdbcgLevelize 0
|
||||
fHsimParGateEvalMode 0
|
||||
fHsimDFuseVectors 0
|
||||
fHsimDFuseZero 0
|
||||
fHsimDFuseOpt 1
|
||||
fHsimPruneOpt 0
|
||||
fHsimSeqUdpPruneWithConstInputs 0
|
||||
fHsimSafeDFuse 0
|
||||
fHsimVpdOptExpVec 0
|
||||
fHsimVpdOptSelGate 1
|
||||
fHsimVpdOptSkipFuncPorts 0
|
||||
fHsimVpdOptAlways 1
|
||||
fHsimVpdOptMdbCell 0
|
||||
fHsimVpdOptPartialMdb 1
|
||||
fHsimVpdOptPartitionGate 1
|
||||
fHsimVpdOptXmr 1
|
||||
fHsimVpdHilRtl 0
|
||||
fHsimSWave 0
|
||||
fHsimNoSched0InCell 1
|
||||
fHsimPartialMdb 0
|
||||
hsimPdbLargeOffsetThreshold 1048576
|
||||
fHsimFlatCell 0
|
||||
fHsimFlatCellLimit 0
|
||||
fHsimRegBank 0
|
||||
fHsimHmetisMaxPartSize 0
|
||||
fHsimHmetisGateWt 0
|
||||
fHsimHmetisUbFactor 0
|
||||
fHsimHmetis 0
|
||||
fHsimHmetisDiag 0
|
||||
fHsimRenumGatesForMdbCell 0
|
||||
fHsimHmetisMinPart 0
|
||||
fHsim2stCell 0
|
||||
fHsim2stCellMinSize 0
|
||||
fHsimMdbcgDebug 0
|
||||
fHsimMdbcgDebugLite 0
|
||||
fHsimMdbcgDistrib 0
|
||||
fHsimMdbcgSepmem 1
|
||||
fHsimMdbcgObjDiag 0
|
||||
fHsimMdbcg2stDiag 0
|
||||
fHsimMdbcgRttrace 0
|
||||
fHsimMdbVectorGateGroup 1
|
||||
fHsimMdbProcDfuse 1
|
||||
fHsimMdbHilPrune 0
|
||||
fHsCgOpt 1
|
||||
fHsCgOptUdp 1
|
||||
fHsCgOptRtl 1
|
||||
fHsCgOptDiag 0
|
||||
fHsCgOptAggr 0
|
||||
fHsCgOptNoZCheck 0
|
||||
fHsCgOptEnableZSupport 0
|
||||
fHsCgOpt4StateInfra 0
|
||||
fHsCgOptUdpChkDataForWakeup 1
|
||||
fHsCgOptXprop 0
|
||||
fHsimMdbcgDiag 0
|
||||
fHsCgMaxInputs 6
|
||||
fHsCgOptFwdPass 1
|
||||
fHsimHpnodes 0
|
||||
fLightDump 0
|
||||
fHDLCosim 0
|
||||
fHDLCosimDebug 0
|
||||
fHDLCosimTimeCoupled 0
|
||||
fHDLCosimTimeCoupledPorts 0
|
||||
HDLCosimMaxDataPerDpi 1
|
||||
HDLCosimMaxCallsPerDpi 2147483647
|
||||
fHDLCosimCompileDUT 0
|
||||
fHDLCosimCustomCompile 0
|
||||
fHDLCosimBoundaryAnalysis 0
|
||||
fVpdBeforeScan 1
|
||||
fHsCgOptMiSched0 0
|
||||
fgcAddSched0 0
|
||||
fParamClassOptRtDiag 0
|
||||
fHsRegress 0
|
||||
fHsBenchmark 0
|
||||
fHsimCgScalarVerilogForce 1
|
||||
fVcsElabToRoot 1
|
||||
fHilIbnObnCallByName 0
|
||||
fHsimMdbcgCellPartition 0
|
||||
fHsimCompressVpdSig 0
|
||||
fHsimLowPowerOpt 0
|
||||
fHsimUdpOpt 1
|
||||
fHsVecOneld 0
|
||||
fNativeVpdDebug 0
|
||||
fHsimVcsGenTLS 1
|
||||
fAssertSuccDebugLevelDump 0
|
||||
fHsimMinputsChangeCheck 0
|
||||
fHsimClkLayout 0
|
||||
fHsimIslandLayout 0
|
||||
fHsimConfigSched0 0
|
||||
fHsimSelectFuseAfterDfuse 0
|
||||
fHsimFoldedCell 0
|
||||
fHsimSWaveEmul 0
|
||||
fHsimSWaveDumpMDB 0
|
||||
fHsimSWaveDumpFlatData 0
|
||||
fHsimRenumberAlias 0
|
||||
fHsimAliasRenumbered 0
|
||||
fHilCgMode 115
|
||||
fHsimUnionOpt 0
|
||||
fHsimFuseSGDBoundaryNodes 0
|
||||
fHsimRemoveCapsVec 0
|
||||
fHsimCertRaptScal 0
|
||||
fHsimCertRaptMdbClock 0
|
||||
fHsCgOptMux 0
|
||||
fHsCgOptFrc 0
|
||||
fHsCgOpt30 0
|
||||
fHsLpNoCapsOpt 0
|
||||
fHsCgOpt4State 1
|
||||
fSkipStrChangeOnDelay 1
|
||||
fHsimTcheckOpt 0
|
||||
fHsCgOptMuxMClk 0
|
||||
fHsCgOptMuxFrc 0
|
||||
fHsCgOptNoPcb 0
|
||||
fHsCgOptMin1 0
|
||||
fHsCgOptUdpChk 0
|
||||
fHsChkXForSlowSigProp 1
|
||||
fHsimVcsParallelDbg 0
|
||||
fHsimVcsParallelStrategy 0
|
||||
fHsimVcsParallelOpt 0
|
||||
fHsimVcsParallelSubLevel 4
|
||||
fHsimParallelEblk 0
|
||||
fHsimByteCodeParts 1
|
||||
fFgpNovlInComp 0
|
||||
fFutEventPRL 0
|
||||
fFgpNbaDelay 0
|
||||
fHsimDbsFlagsByteArray 0
|
||||
fHsimDbsFlagsByteArrayTC 0
|
||||
fHsimDbsFlagsThreadArray 0
|
||||
fHsimGateEdgeEventSched 0
|
||||
fHsimEgschedDynelab 0
|
||||
fHsimUdpClkDynelab 0
|
||||
fUdpLayoutOnClk 0
|
||||
fDbsPreCheck 0
|
||||
fHsimSched0Analysis 0
|
||||
fHsimMultiDriverSched0 0
|
||||
fHsimLargeIbnSched 0
|
||||
fFgpHierarchical 0
|
||||
fFgpHierAllElabModAsRoot 0
|
||||
fFgpHierPCElabModAsRoot 0
|
||||
fFgpAdjustDataLevelOfLatch 1
|
||||
fHsimUdpXedgeEval 0
|
||||
fFgpRaceCheck 0
|
||||
fFgpUnifyClk 0
|
||||
fFgpSmallClkTree 0
|
||||
fFgpSmallRtlClkTree 4
|
||||
fFgpNoRtlUnlink 0
|
||||
fFgpNoRtlAuxLevel 0
|
||||
fFgpNumPartitions 8
|
||||
fFgpMultiSocketCompile 0
|
||||
fFgpDataDepOn 0
|
||||
fFgpDDIgnore 0
|
||||
fFgpTbCbOn 0
|
||||
fFgpTbEvOn 1
|
||||
fFgpTbNoVSA 0
|
||||
fFgpTbEvXmr 0
|
||||
fFgpDisabledLevel 512
|
||||
fFgpSched0User 0
|
||||
fFgpNoSdDelayedNbas 1
|
||||
fFgpTimingFlags 0
|
||||
fFgpSched0Level 0
|
||||
fHsimFgpMultiClock 0
|
||||
fFgpScanOptFix 0
|
||||
fFgpSched0UdpData 0
|
||||
fFgpDepositDiag 0
|
||||
fFgpEvtDiag.diagOn 0
|
||||
fFgpEvtDiag.printAllNodes 0
|
||||
fFgpMangleDiagLog 0
|
||||
fFgpMultiExclDiag 0
|
||||
fFgpSingleExclReason 0
|
||||
fHsDoFaninFanoutSanity 0
|
||||
fHsFgpNonDbsOva 1
|
||||
fFgpParallelTask 1
|
||||
fFgpIbnSched 0
|
||||
fFgpIbnSchedOpt 0
|
||||
fFgpIbnSchedThreshold 0
|
||||
fFgpIbnSchedDyn 0
|
||||
fFgpMpStateByte 0
|
||||
fFgpTcStateByte 0
|
||||
fHsimVirtIntfDynLoadSched 0
|
||||
fFgpNoRtimeFgp 0
|
||||
fHsFgpGlSched0 0
|
||||
fFgpExclReason 0
|
||||
fHsimIslandByIslandElab 0
|
||||
fHsimIslandByIslandFlat 151652416
|
||||
fHsimIslandByIslandFlat1 4
|
||||
fHsimVpdIBIF 0
|
||||
fHsimXmrIBIF 0
|
||||
fHsimReportTime 0
|
||||
fHsimElabJ 0
|
||||
hf_fHsimElabJ 0
|
||||
fHsimElabJOpt 0
|
||||
fHsimSchedMinput 0
|
||||
fHsimSchedSeqPrim 0
|
||||
fHsimSchedSelectFanout 0
|
||||
fHsimSchedSelectFanoutDebug 0
|
||||
fSpecifyInDesign 0
|
||||
fFgpDynamicReadOn 0
|
||||
fHsCgOptAllUc 0
|
||||
fHsimXmrRepl 0
|
||||
fZoix 0
|
||||
fHsimDfuseNewOpt 0
|
||||
fHsimBfuseNewOpt 0
|
||||
fFgpXmrSched 0
|
||||
fHsimClearClkCaps 0
|
||||
fHsimDiagClkConfig 0
|
||||
fHsimDiagClkConfigDebug 0
|
||||
fHsimDiagClkConfigDumpAll 0
|
||||
fHsDiagClkConfigPara 0
|
||||
fHsimDiagClkConfigAn 0
|
||||
fHsimCanDumpClkConfig 0
|
||||
fFgpInitRout 0
|
||||
fFgpIgnoreExclSD 0
|
||||
fHsCgOptNoClockFusing 0
|
||||
fHsClkWheelLimit 50000
|
||||
fHsimPCSharedLibSpecified 0
|
||||
fHsFgpSchedCgUcLoads 1
|
||||
fHsCgOptNewSelCheck 1
|
||||
fFgpReportUnsafeFuncs 0
|
||||
fHsCgOptUncPrlThreshold 4
|
||||
fHsimLowPowerRetAnalysisInChild 0
|
||||
Reference in New Issue
Block a user