v1.0

tb/tb_sync_fifo_64_to_128.v

@@ -0,0 +1,100 @@
+`timescale 1ns/1ps
+module tb_sync_fifo_64_to_128;
+parameter DATA_IN_WIDTH = 64;
+parameter DATA_OUT_WIDTH = 128;
+parameter FIFO_DEPTH = 8;
+
+reg clk;
+reg rst_n;
+reg wr_en;
+reg [DATA_IN_WIDTH -1:0] wr_data;
+wire full;
+reg rd_en;
+wire [DATA_OUT_WIDTH -1:0] rd_data;
+wire empty;
+
+sync_fifo_64_to_128 #(
+    .DATA_IN_WIDTH(DATA_IN_WIDTH),
+    .DATA_OUT_WIDTH(DATA_OUT_WIDTH),
+    .FIFO_DEPTH(FIFO_DEPTH)
+) u_sync_fifo_64_to_128(
+    .clk(clk),
+    .rst_n(rst_n),
+    .wr_en(wr_en),
+    .wr_data(wr_data),
+    .full(full),
+    .rd_en(rd_en),
+    .rd_data(rd_data),
+    .empty(empty)
+);
+
+initial begin
+    clk = 0;
+    forever begin
+        #10;
+        clk = ~clk;
+    end
+end
+
+initial begin
+init;
+push;
+pop;
+$fsdbDumpfile("tb.fsdb");
+$fsdbDumpvars(0,tb_sync_fifo_64_to_128,"+all");
+#100;
+$finish;
+end
+
+task init;
+begin
+    rst_n = 0;
+    #30;
+    rst_n = 1'b1;
+    wr_en = 'b0;
+    wr_data = 5'd19;
+    rd_en = 'b0;
+end
+endtask
+
+integer i;
+task push;
+begin
+for(i=0;i<=20;i=i+1) begin
+@(posedge clk) begin
+    wr_data <= i+5'd20;
+    wr_en <= 1;
+    if(!full) begin
+    $display("write data is %0h",wr_data);
+    end else begin
+    $display("cannot push! fifo is full!");
+    end
+end
+end
+wr_en <= 0;
+end
+endtask
+
+task pop;
+begin
+for(i=0;i<=20;i=i+1) begin
+    @(posedge clk) begin
+        rd_en <= 1;
+    if(!empty) begin
+    $display("read data is %0h",rd_data);
+    end else begin
+    $display("cannot pop! fifo is empty!");
+    end
+    end
+end
+rd_en = 0;
+end
+endtask
+
+
+
+
+endmodule
+
+
+