Finish top-module(axi_slave test_successful): 2025-08-06 22:43:10
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@@ -1,15 +1,15 @@
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rc file Version 1.0
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[Design]
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COMPILE_PATH=/home/ICer/ic_prjs/mc/sim
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COMPILE_PATH=/home/ICer/ic_prjs/mc/IC_PRJ/sim
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SystemC=FALSE
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UUM=FALSE
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KDB=FALSE
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USE_NOVAS_HOME=FALSE
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COSIM=FALSE
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TOP=tb_rchannel
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OPTION=-ssz -ssv -ssy
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ELAB_OPTION=-ssz -ssv -ssy
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OPTION=-ssv -ssy
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ELAB_OPTION=-ssv -ssy
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[Value]
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WREALX=ffff534e50535f58
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