Finish top-module(axi_slave array_ctrl apb_cfg): 2025-08-13 16:39:12
This commit is contained in:
Core_kingdom
@@ -2,158 +2,154 @@
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# log primitive debug message of FSDB dumping #
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# This is for R&D to analyze when there are issues happening when FSDB dump #
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#######################################################################################
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ANF: vcsd_get_serial_mode_status('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vcsd_get_serial_mode_status')
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ANF: vcsd_enable_sva_success_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vcsd_enable_sva_success_callback')
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ANF: vcsd_disable_sva_success_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vcsd_disable_sva_success_callback')
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ANF: vcsd_get_thread_id('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vcsd_get_thread_id')
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ANF: vcsd_get_power_scope_name('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vcsd_get_power_scope_name')
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ANF: vcsd_begin_no_value_var_info('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vcsd_begin_no_value_var_info')
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ANF: vcsd_end_no_value_var_info('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vcsd_end_no_value_var_info')
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ANF: vcsd_remove_xprop_merge_mode_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vcsd_remove_xprop_merge_mode_callback')
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ANF: vcsd_node_check_native_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vcsd_node_check_native_callback')
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ANF: vcsd_node_add_native_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vcsd_node_add_native_callback')
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ANF: vcsdIsNativeVc('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vcsdIsNativeVc')
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ANF: vhpi_get_cb_info('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhpi_get_cb_info')
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ANF: vhpi_free_handle('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhpi_free_handle')
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ANF: vhpi_fetch_vcsd_handle('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhpi_fetch_vcsd_handle')
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ANF: vhpi_fetch_vpi_handle('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhpi_fetch_vpi_handle')
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ANF: vhpi_has_verilog_parent('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhpi_has_verilog_parent')
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ANF: vhpi_is_verilog_scope('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhpi_is_verilog_scope')
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ANF: scsd_xprop_is_enabled('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: scsd_xprop_is_enabled')
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ANF: scsd_xprop_sig_is_promoted('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: scsd_xprop_sig_is_promoted')
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ANF: scsd_xprop_int_xvalue('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: scsd_xprop_int_xvalue')
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ANF: scsd_xprop_bool_xvalue('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: scsd_xprop_bool_xvalue')
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ANF: scsd_xprop_enum_xvalue('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: scsd_xprop_enum_xvalue')
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ANF: scsd_xprop_register_merge_mode_cb('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: scsd_xprop_register_merge_mode_cb')
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ANF: scsd_xprop_delete_merge_mode_cb('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: scsd_xprop_delete_merge_mode_cb')
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ANF: scsd_xprop_get_merge_mode('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: scsd_xprop_get_merge_mode')
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ANF: scsd_thread_get_info('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: scsd_thread_get_info')
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ANF: scsd_thread_vc_init('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: scsd_thread_vc_init')
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ANF: scsd_master_set_delta_sync_cbk('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: scsd_master_set_delta_sync_cbk')
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ANF: scsd_fgp_get_fsdb_cores('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: scsd_fgp_get_fsdb_cores')
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ANF: msvEnableDumpingMode('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvEnableDumpingMode')
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ANF: msvGetVersion('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvGetVersion')
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ANF: msvGetInstProp('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvGetInstProp')
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ANF: msvIsSpiceEngineReady('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvIsSpiceEngineReady')
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ANF: msvSetAddProbeCallback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvSetAddProbeCallback')
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ANF: msvGetInstHandle('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvGetInstHandle')
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ANF: msvGetProbeByInst('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvGetProbeByInst')
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ANF: msvGetSigHandle('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvGetSigHandle')
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ANF: msvGetProbeBySig('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvGetProbeBySig')
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ANF: msvGetProbeInfo('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvGetProbeInfo')
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ANF: msvRelease('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvRelease')
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ANF: msvSetVcCallbackFunc('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvSetVcCallbackFunc')
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ANF: msvCheckVcCallback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvCheckVcCallback')
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ANF: msvAddVcCallback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvAddVcCallback')
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ANF: msvRemoveVcCallback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvRemoveVcCallback')
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ANF: msvGetLatestValue('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvGetLatestValue')
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ANF: msvSetEndofSimCallback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvSetEndofSimCallback')
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ANF: msvIgnoredProbe('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvIgnoredProbe')
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ANF: msvGetThruNetInfo('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvGetThruNetInfo')
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ANF: msvFreeThruNetInfo('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvFreeThruNetInfo')
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ANF: PI_ace_get_output_time_unit('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: PI_ace_get_output_time_unit')
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ANF: PI_ace_sim_sync('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: PI_ace_sim_sync')
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ANF: msvGetRereadInitFile('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvGetRereadInitFile')
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ANF: msvSetBeforeRereadCallback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvSetBeforeRereadCallback')
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ANF: msvSetAfterRereadCallback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvSetAfterRereadCallback')
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ANF: msvSetForceCallback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvSetForceCallback')
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ANF: msvSetReleaseCallback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvSetReleaseCallback')
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ANF: msvGetForceStatus('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: msvGetForceStatus')
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ANF: vdi_fn_trigger_native_init_force('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vdi_fn_trigger_native_init_force')
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ANF: vdi_set_native_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vdi_set_native_callback')
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ANF: vdi_fn_check_native_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vdi_fn_check_native_callback')
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ANF: vdi_fn_add_native_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vdi_fn_add_native_callback')
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ANF: vhdi_dt_get_type('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_dt_get_type')
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ANF: vhdi_dt_get_key('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_dt_get_key')
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ANF: vhdi_dt_get_vhdl_enum_info('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_dt_get_vhdl_enum_info')
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ANF: vhdi_dt_get_vhdl_physical_info('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_dt_get_vhdl_physical_info')
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ANF: vhdi_dt_get_vhdl_array_info('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_dt_get_vhdl_array_info')
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ANF: vhdi_dt_get_vhdl_record_info('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_dt_get_vhdl_record_info')
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ANF: vhdi_def_traverse_module('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_def_traverse_module')
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ANF: vhdi_def_traverse_scope('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_def_traverse_scope')
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ANF: vhdi_def_traverse_variable('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_def_traverse_variable')
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ANF: vhdi_def_get_module_id_by_vhpi('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_def_get_module_id_by_vhpi')
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ANF: vhdi_def_get_handle_by_module_id('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_def_get_handle_by_module_id')
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ANF: vhdi_def_get_variable_info_by_vhpi('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_def_get_variable_info_by_vhpi')
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ANF: vhdi_def_free('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_def_free')
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ANF: vhdi_ist_traverse_scope('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_ist_traverse_scope')
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ANF: vhdi_ist_traverse_variable('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_ist_traverse_variable')
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ANF: vhdi_ist_convert_by_vhpi('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_ist_convert_by_vhpi')
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ANF: vhdi_ist_clone('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_ist_clone')
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ANF: vhdi_ist_free('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_ist_free')
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ANF: vhdi_ist_hash_key('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_ist_hash_key')
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ANF: vhdi_ist_compare('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_ist_compare')
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ANF: vhdi_ist_get_value_addr('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_ist_get_value_addr')
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ANF: vhdi_set_scsd_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_set_scsd_callback')
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ANF: vhdi_cbk_set_force_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_cbk_set_force_callback')
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ANF: vhdi_trigger_init_force('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_trigger_init_force')
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ANF: vhdi_ist_check_scsd_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_ist_check_scsd_callback')
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ANF: vhdi_ist_add_scsd_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_ist_add_scsd_callback')
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ANF: vhdi_ist_remove_scsd_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_ist_remove_scsd_callback')
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ANF: vhdi_ist_get_scsd_user_data('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_ist_get_scsd_user_data')
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ANF: vhdi_add_time_change_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_add_time_change_callback')
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ANF: vhdi_get_real_value_by_value_addr('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_get_real_value_by_value_addr')
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ANF: vhdi_get_64_value_by_value_addr('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_get_64_value_by_value_addr')
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ANF: vhdi_xprop_inst_is_promoted('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_xprop_inst_is_promoted')
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ANF: vdi_ist_convert_by_vhdi('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vdi_ist_convert_by_vhdi')
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ANF: vhdi_ist_get_module_id('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_ist_get_module_id')
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ANF: vhdi_refine_foreign_scope_type('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_refine_foreign_scope_type')
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ANF: vhdi_flush_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_flush_callback')
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ANF: vhdi_set_orig_name('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_set_orig_name')
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ANF: vhdi_set_dump_pt('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_set_dump_pt')
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ANF: vhdi_get_fsdb_option('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_get_fsdb_option')
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ANF: vhdi_fgp_get_mode('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_fgp_get_mode')
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ANF: vhdi_node_register_composite_var('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_node_register_composite_var')
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ANF: vhdi_node_analysis('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_node_analysis')
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ANF: vhdi_node_id('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_node_id')
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ANF: vhdi_node_ist_check_scsd_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_node_ist_check_scsd_callback')
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ANF: vhdi_node_ist_add_scsd_callback('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_node_ist_add_scsd_callback')
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ANF: vhdi_node_ist_get_value_addr('/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv: undefined symbol: vhdi_node_ist_get_value_addr')
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ANF: vcsd_get_serial_mode_status('simv: undefined symbol: vcsd_get_serial_mode_status')
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ANF: vcsd_enable_sva_success_callback('simv: undefined symbol: vcsd_enable_sva_success_callback')
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ANF: vcsd_disable_sva_success_callback('simv: undefined symbol: vcsd_disable_sva_success_callback')
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ANF: vcsd_get_thread_id('simv: undefined symbol: vcsd_get_thread_id')
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ANF: vcsd_get_power_scope_name('simv: undefined symbol: vcsd_get_power_scope_name')
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ANF: vcsd_begin_no_value_var_info('simv: undefined symbol: vcsd_begin_no_value_var_info')
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ANF: vcsd_end_no_value_var_info('simv: undefined symbol: vcsd_end_no_value_var_info')
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ANF: vcsd_remove_xprop_merge_mode_callback('simv: undefined symbol: vcsd_remove_xprop_merge_mode_callback')
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ANF: vcsd_node_check_native_callback('simv: undefined symbol: vcsd_node_check_native_callback')
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ANF: vcsd_node_add_native_callback('simv: undefined symbol: vcsd_node_add_native_callback')
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ANF: vcsdIsNativeVc('simv: undefined symbol: vcsdIsNativeVc')
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ANF: vhpi_get_cb_info('simv: undefined symbol: vhpi_get_cb_info')
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ANF: vhpi_free_handle('simv: undefined symbol: vhpi_free_handle')
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ANF: vhpi_fetch_vcsd_handle('simv: undefined symbol: vhpi_fetch_vcsd_handle')
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ANF: vhpi_fetch_vpi_handle('simv: undefined symbol: vhpi_fetch_vpi_handle')
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ANF: vhpi_has_verilog_parent('simv: undefined symbol: vhpi_has_verilog_parent')
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ANF: vhpi_is_verilog_scope('simv: undefined symbol: vhpi_is_verilog_scope')
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ANF: scsd_xprop_is_enabled('simv: undefined symbol: scsd_xprop_is_enabled')
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ANF: scsd_xprop_sig_is_promoted('simv: undefined symbol: scsd_xprop_sig_is_promoted')
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ANF: scsd_xprop_int_xvalue('simv: undefined symbol: scsd_xprop_int_xvalue')
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ANF: scsd_xprop_bool_xvalue('simv: undefined symbol: scsd_xprop_bool_xvalue')
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ANF: scsd_xprop_enum_xvalue('simv: undefined symbol: scsd_xprop_enum_xvalue')
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||||
ANF: scsd_xprop_register_merge_mode_cb('simv: undefined symbol: scsd_xprop_register_merge_mode_cb')
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ANF: scsd_xprop_delete_merge_mode_cb('simv: undefined symbol: scsd_xprop_delete_merge_mode_cb')
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ANF: scsd_xprop_get_merge_mode('simv: undefined symbol: scsd_xprop_get_merge_mode')
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ANF: scsd_thread_get_info('simv: undefined symbol: scsd_thread_get_info')
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ANF: scsd_thread_vc_init('simv: undefined symbol: scsd_thread_vc_init')
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ANF: scsd_master_set_delta_sync_cbk('simv: undefined symbol: scsd_master_set_delta_sync_cbk')
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ANF: scsd_fgp_get_fsdb_cores('simv: undefined symbol: scsd_fgp_get_fsdb_cores')
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ANF: msvEnableDumpingMode('simv: undefined symbol: msvEnableDumpingMode')
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ANF: msvGetVersion('simv: undefined symbol: msvGetVersion')
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||||
ANF: msvGetInstProp('simv: undefined symbol: msvGetInstProp')
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ANF: msvIsSpiceEngineReady('simv: undefined symbol: msvIsSpiceEngineReady')
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ANF: msvSetAddProbeCallback('simv: undefined symbol: msvSetAddProbeCallback')
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ANF: msvGetInstHandle('simv: undefined symbol: msvGetInstHandle')
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ANF: msvGetProbeByInst('simv: undefined symbol: msvGetProbeByInst')
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||||
ANF: msvGetSigHandle('simv: undefined symbol: msvGetSigHandle')
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ANF: msvGetProbeBySig('simv: undefined symbol: msvGetProbeBySig')
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||||
ANF: msvGetProbeInfo('simv: undefined symbol: msvGetProbeInfo')
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||||
ANF: msvRelease('simv: undefined symbol: msvRelease')
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||||
ANF: msvSetVcCallbackFunc('simv: undefined symbol: msvSetVcCallbackFunc')
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||||
ANF: msvCheckVcCallback('simv: undefined symbol: msvCheckVcCallback')
|
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ANF: msvAddVcCallback('simv: undefined symbol: msvAddVcCallback')
|
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ANF: msvRemoveVcCallback('simv: undefined symbol: msvRemoveVcCallback')
|
||||
ANF: msvGetLatestValue('simv: undefined symbol: msvGetLatestValue')
|
||||
ANF: msvSetEndofSimCallback('simv: undefined symbol: msvSetEndofSimCallback')
|
||||
ANF: msvIgnoredProbe('simv: undefined symbol: msvIgnoredProbe')
|
||||
ANF: msvGetThruNetInfo('simv: undefined symbol: msvGetThruNetInfo')
|
||||
ANF: msvFreeThruNetInfo('simv: undefined symbol: msvFreeThruNetInfo')
|
||||
ANF: PI_ace_get_output_time_unit('simv: undefined symbol: PI_ace_get_output_time_unit')
|
||||
ANF: PI_ace_sim_sync('simv: undefined symbol: PI_ace_sim_sync')
|
||||
ANF: msvGetRereadInitFile('simv: undefined symbol: msvGetRereadInitFile')
|
||||
ANF: msvSetBeforeRereadCallback('simv: undefined symbol: msvSetBeforeRereadCallback')
|
||||
ANF: msvSetAfterRereadCallback('simv: undefined symbol: msvSetAfterRereadCallback')
|
||||
ANF: msvSetForceCallback('simv: undefined symbol: msvSetForceCallback')
|
||||
ANF: msvSetReleaseCallback('simv: undefined symbol: msvSetReleaseCallback')
|
||||
ANF: msvGetForceStatus('simv: undefined symbol: msvGetForceStatus')
|
||||
ANF: vdi_fn_trigger_native_init_force('simv: undefined symbol: vdi_fn_trigger_native_init_force')
|
||||
ANF: vdi_set_native_callback('simv: undefined symbol: vdi_set_native_callback')
|
||||
ANF: vdi_fn_check_native_callback('simv: undefined symbol: vdi_fn_check_native_callback')
|
||||
ANF: vdi_fn_add_native_callback('simv: undefined symbol: vdi_fn_add_native_callback')
|
||||
ANF: vhdi_dt_get_type('simv: undefined symbol: vhdi_dt_get_type')
|
||||
ANF: vhdi_dt_get_key('simv: undefined symbol: vhdi_dt_get_key')
|
||||
ANF: vhdi_dt_get_vhdl_enum_info('simv: undefined symbol: vhdi_dt_get_vhdl_enum_info')
|
||||
ANF: vhdi_dt_get_vhdl_physical_info('simv: undefined symbol: vhdi_dt_get_vhdl_physical_info')
|
||||
ANF: vhdi_dt_get_vhdl_array_info('simv: undefined symbol: vhdi_dt_get_vhdl_array_info')
|
||||
ANF: vhdi_dt_get_vhdl_record_info('simv: undefined symbol: vhdi_dt_get_vhdl_record_info')
|
||||
ANF: vhdi_def_traverse_module('simv: undefined symbol: vhdi_def_traverse_module')
|
||||
ANF: vhdi_def_traverse_scope('simv: undefined symbol: vhdi_def_traverse_scope')
|
||||
ANF: vhdi_def_traverse_variable('simv: undefined symbol: vhdi_def_traverse_variable')
|
||||
ANF: vhdi_def_get_module_id_by_vhpi('simv: undefined symbol: vhdi_def_get_module_id_by_vhpi')
|
||||
ANF: vhdi_def_get_handle_by_module_id('simv: undefined symbol: vhdi_def_get_handle_by_module_id')
|
||||
ANF: vhdi_def_get_variable_info_by_vhpi('simv: undefined symbol: vhdi_def_get_variable_info_by_vhpi')
|
||||
ANF: vhdi_def_free('simv: undefined symbol: vhdi_def_free')
|
||||
ANF: vhdi_ist_traverse_scope('simv: undefined symbol: vhdi_ist_traverse_scope')
|
||||
ANF: vhdi_ist_traverse_variable('simv: undefined symbol: vhdi_ist_traverse_variable')
|
||||
ANF: vhdi_ist_convert_by_vhpi('simv: undefined symbol: vhdi_ist_convert_by_vhpi')
|
||||
ANF: vhdi_ist_clone('simv: undefined symbol: vhdi_ist_clone')
|
||||
ANF: vhdi_ist_free('simv: undefined symbol: vhdi_ist_free')
|
||||
ANF: vhdi_ist_hash_key('simv: undefined symbol: vhdi_ist_hash_key')
|
||||
ANF: vhdi_ist_compare('simv: undefined symbol: vhdi_ist_compare')
|
||||
ANF: vhdi_ist_get_value_addr('simv: undefined symbol: vhdi_ist_get_value_addr')
|
||||
ANF: vhdi_set_scsd_callback('simv: undefined symbol: vhdi_set_scsd_callback')
|
||||
ANF: vhdi_cbk_set_force_callback('simv: undefined symbol: vhdi_cbk_set_force_callback')
|
||||
ANF: vhdi_trigger_init_force('simv: undefined symbol: vhdi_trigger_init_force')
|
||||
ANF: vhdi_ist_check_scsd_callback('simv: undefined symbol: vhdi_ist_check_scsd_callback')
|
||||
ANF: vhdi_ist_add_scsd_callback('simv: undefined symbol: vhdi_ist_add_scsd_callback')
|
||||
ANF: vhdi_ist_remove_scsd_callback('simv: undefined symbol: vhdi_ist_remove_scsd_callback')
|
||||
ANF: vhdi_ist_get_scsd_user_data('simv: undefined symbol: vhdi_ist_get_scsd_user_data')
|
||||
ANF: vhdi_add_time_change_callback('simv: undefined symbol: vhdi_add_time_change_callback')
|
||||
ANF: vhdi_get_real_value_by_value_addr('simv: undefined symbol: vhdi_get_real_value_by_value_addr')
|
||||
ANF: vhdi_get_64_value_by_value_addr('simv: undefined symbol: vhdi_get_64_value_by_value_addr')
|
||||
ANF: vhdi_xprop_inst_is_promoted('simv: undefined symbol: vhdi_xprop_inst_is_promoted')
|
||||
ANF: vdi_ist_convert_by_vhdi('simv: undefined symbol: vdi_ist_convert_by_vhdi')
|
||||
ANF: vhdi_ist_get_module_id('simv: undefined symbol: vhdi_ist_get_module_id')
|
||||
ANF: vhdi_refine_foreign_scope_type('simv: undefined symbol: vhdi_refine_foreign_scope_type')
|
||||
ANF: vhdi_flush_callback('simv: undefined symbol: vhdi_flush_callback')
|
||||
ANF: vhdi_set_orig_name('simv: undefined symbol: vhdi_set_orig_name')
|
||||
ANF: vhdi_set_dump_pt('simv: undefined symbol: vhdi_set_dump_pt')
|
||||
ANF: vhdi_get_fsdb_option('simv: undefined symbol: vhdi_get_fsdb_option')
|
||||
ANF: vhdi_fgp_get_mode('simv: undefined symbol: vhdi_fgp_get_mode')
|
||||
ANF: vhdi_node_register_composite_var('simv: undefined symbol: vhdi_node_register_composite_var')
|
||||
ANF: vhdi_node_analysis('simv: undefined symbol: vhdi_node_analysis')
|
||||
ANF: vhdi_node_id('simv: undefined symbol: vhdi_node_id')
|
||||
ANF: vhdi_node_ist_check_scsd_callback('simv: undefined symbol: vhdi_node_ist_check_scsd_callback')
|
||||
ANF: vhdi_node_ist_add_scsd_callback('simv: undefined symbol: vhdi_node_ist_add_scsd_callback')
|
||||
ANF: vhdi_node_ist_get_value_addr('simv: undefined symbol: vhdi_node_ist_get_value_addr')
|
||||
VCS compile option:
|
||||
option[0]: /home/ICer/ic_prjs/mc/IC_PRJ/sim/simv
|
||||
option[1]: -sml=verdi
|
||||
option[2]: +fsdb+gate=off
|
||||
option[3]: -ucli2Proc
|
||||
option[4]: -ucli
|
||||
option[5]: -l
|
||||
option[6]: /home/ICer/ic_prjs/mc/IC_PRJ/sim/verdiLog/sim.log
|
||||
option[7]: /home/synopsys/vcs-mx/O-2018.09-1/linux64/bin/vcs1
|
||||
option[8]: -Mcc=gcc
|
||||
option[9]: -Mcplusplus=g++
|
||||
option[10]: -Masflags=
|
||||
option[11]: -Mcfl= -pipe -fPIC -O -I/home/synopsys/vcs-mx/O-2018.09-1/include
|
||||
option[12]: -Mxcflags= -pipe -fPIC -I/home/synopsys/vcs-mx/O-2018.09-1/include
|
||||
option[13]: -Mldflags= -rdynamic
|
||||
option[14]: -Mout=simv
|
||||
option[15]: -Mamsrun=
|
||||
option[16]: -Mvcsaceobjs=
|
||||
option[17]: -Mobjects= /home/synopsys/vcs-mx/O-2018.09-1/linux64/lib/libvirsim.so /home/synopsys/vcs-mx/O-2018.09-1/linux64/lib/liberrorinf.so /home/synopsys/vcs-mx/O-2018.09-1/linux64/lib/libsnpsmalloc.so /home/synopsys/vcs-mx/O-2018.09-1/linux64/lib/libvfs.so
|
||||
option[18]: -Mexternalobj=
|
||||
option[19]: -Msaverestoreobj=/home/synopsys/vcs-mx/O-2018.09-1/linux64/lib/vcs_save_restore_new.o
|
||||
option[20]: -Mcrt0=
|
||||
option[21]: -Mcrtn=
|
||||
option[22]: -Mcsrc=
|
||||
option[23]: -Msyslibs=/home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/pli.a -ldl
|
||||
option[24]: -Xvcs_run_simv=1
|
||||
option[25]: -timescale=1ns/1ps
|
||||
option[26]: -full64
|
||||
option[27]: +vc
|
||||
option[28]: +v2k
|
||||
option[29]: -debug_access+all
|
||||
option[30]: +vpi
|
||||
option[31]: +vcsd1
|
||||
option[32]: +itf+/home/synopsys/vcs-mx/O-2018.09-1/linux64/lib/vcsdp_lite.tab
|
||||
option[33]: -picarchive
|
||||
option[34]: -P
|
||||
option[35]: /home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab
|
||||
option[36]: -fsdb
|
||||
option[37]: -sverilog
|
||||
option[38]: -gen_obj
|
||||
option[39]: -f
|
||||
option[40]: filelist.f
|
||||
option[41]: -load
|
||||
option[42]: /home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/libnovas.so:FSDBDumpCmd
|
||||
option[43]: timescale=1ns/1ps
|
||||
option[0]: simv
|
||||
option[1]: +vc
|
||||
option[2]: +v2k
|
||||
option[3]: /home/synopsys/vcs-mx/O-2018.09-1/linux64/bin/vcs1
|
||||
option[4]: -Mcc=gcc
|
||||
option[5]: -Mcplusplus=g++
|
||||
option[6]: -Masflags=
|
||||
option[7]: -Mcfl= -pipe -fPIC -O -I/home/synopsys/vcs-mx/O-2018.09-1/include
|
||||
option[8]: -Mxcflags= -pipe -fPIC -I/home/synopsys/vcs-mx/O-2018.09-1/include
|
||||
option[9]: -Mldflags= -rdynamic
|
||||
option[10]: -Mout=simv
|
||||
option[11]: -Mamsrun=
|
||||
option[12]: -Mvcsaceobjs=
|
||||
option[13]: -Mobjects= /home/synopsys/vcs-mx/O-2018.09-1/linux64/lib/libvirsim.so /home/synopsys/vcs-mx/O-2018.09-1/linux64/lib/liberrorinf.so /home/synopsys/vcs-mx/O-2018.09-1/linux64/lib/libsnpsmalloc.so /home/synopsys/vcs-mx/O-2018.09-1/linux64/lib/libvfs.so
|
||||
option[14]: -Mexternalobj=
|
||||
option[15]: -Msaverestoreobj=/home/synopsys/vcs-mx/O-2018.09-1/linux64/lib/vcs_save_restore_new.o
|
||||
option[16]: -Mcrt0=
|
||||
option[17]: -Mcrtn=
|
||||
option[18]: -Mcsrc=
|
||||
option[19]: -Msyslibs=/home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/pli.a -ldl
|
||||
option[20]: -Xvcs_run_simv=1
|
||||
option[21]: -timescale=1ns/1ps
|
||||
option[22]: -full64
|
||||
option[23]: +vc
|
||||
option[24]: +v2k
|
||||
option[25]: -debug_access+all
|
||||
option[26]: +vpi
|
||||
option[27]: +vcsd1
|
||||
option[28]: +itf+/home/synopsys/vcs-mx/O-2018.09-1/linux64/lib/vcsdp_lite.tab
|
||||
option[29]: -picarchive
|
||||
option[30]: -P
|
||||
option[31]: /home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab
|
||||
option[32]: -fsdb
|
||||
option[33]: -sverilog
|
||||
option[34]: -gen_obj
|
||||
option[35]: -f
|
||||
option[36]: filelist.f
|
||||
option[37]: -load
|
||||
option[38]: /home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/libnovas.so:FSDBDumpCmd
|
||||
option[39]: timescale=1ns/1ps
|
||||
Chronologic Simulation VCS Release O-2018.09-1_Full64
|
||||
Linux 3.10.0-1160.53.1.el7.x86_64 #1 SMP Fri Jan 14 13:59:45 UTC 2022 x86_64
|
||||
CPU cores: 8
|
||||
@@ -173,255 +169,163 @@ maxproc 4096
|
||||
(Special)Runtime environment variables:
|
||||
|
||||
Runtime environment variables:
|
||||
XDG_VTNR=1
|
||||
LC_PAPER=zh_CN.UTF-8
|
||||
SSH_AGENT_PID=3826
|
||||
XDG_SESSION_ID=1
|
||||
XDG_SESSION_ID=2
|
||||
HOSTNAME=IC_EDA
|
||||
LC_MONETARY=zh_CN.UTF-8
|
||||
NOVAS_SYNC_MOTIF_DISP=
|
||||
IMSETTINGS_INTEGRATE_DESKTOP=yes
|
||||
TERM_PROGRAM=vscode
|
||||
UNAME=/bin/uname
|
||||
SELINUX_ROLE_REQUESTED=
|
||||
SCRNAME=vcs
|
||||
VCS_DEPTH=0
|
||||
SHELL=/bin/bash
|
||||
VTE_VERSION=5204
|
||||
XDG_MENU_PREFIX=gnome-
|
||||
TERM=xterm-256color
|
||||
MAKEFLAGS=
|
||||
HISTSIZE=1000
|
||||
SPS_FONT_PATH=/home/synopsys/verdi/Verdi_O-2018.09-SP2/font
|
||||
SSH_CLIENT=192.168.223.1 52776 22
|
||||
QUESTASIM_HOME=/home/mentor/questasim
|
||||
GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/83465594_02bf_4b80_a6ef_1d361b15e756
|
||||
LC_NUMERIC=zh_CN.UTF-8
|
||||
SPS_XFONT_PATH=/home/synopsys/verdi/Verdi_O-2018.09-SP2/XFont
|
||||
SELINUX_USE_CURRENT_RANGE=
|
||||
TERM_PROGRAM_VERSION=1.85.2
|
||||
QTDIR=/usr/lib/qt-3.3
|
||||
QTINC=/usr/lib/qt-3.3/include
|
||||
LC_ALL=C
|
||||
QT_GRAPHICSSYSTEM_CHECKED=1
|
||||
IMSETTINGS_MODULE=none
|
||||
USER=ICer
|
||||
LS_COLORS=rs=0:di=38;5;27:ln=38;5;51:mh=44;38;5;15:pi=40;38;5;11:so=38;5;13:do=38;5;5:bd=48;5;232;38;5;11:cd=48;5;232;38;5;3:or=48;5;232;38;5;9:mi=05;48;5;232;38;5;15:su=48;5;196;38;5;15:sg=48;5;11;38;5;16:ca=48;5;196;38;5;226:tw=48;5;10;38;5;16:ow=48;5;10;38;5;21:st=48;5;21;38;5;15:ex=38;5;34:*.tar=38;5;9:*.tgz=38;5;9:*.arc=38;5;9:*.arj=38;5;9:*.taz=38;5;9:*.lha=38;5;9:*.lz4=38;5;9:*.lzh=38;5;9:*.lzma=38;5;9:*.tlz=38;5;9:*.txz=38;5;9:*.tzo=38;5;9:*.t7z=38;5;9:*.zip=38;5;9:*.z=38;5;9:*.Z=38;5;9:*.dz=38;5;9:*.gz=38;5;9:*.lrz=38;5;9:*.lz=38;5;9:*.lzo=38;5;9:*.xz=38;5;9:*.bz2=38;5;9:*.bz=38;5;9:*.tbz=38;5;9:*.tbz2=38;5;9:*.tz=38;5;9:*.deb=38;5;9:*.rpm=38;5;9:*.jar=38;5;9:*.war=38;5;9:*.ear=38;5;9:*.sar=38;5;9:*.rar=38;5;9:*.alz=38;5;9:*.ace=38;5;9:*.zoo=38;5;9:*.cpio=38;5;9:*.7z=38;5;9:*.rz=38;5;9:*.cab=38;5;9:*.jpg=38;5;13:*.jpeg=38;5;13:*.gif=38;5;13:*.bmp=38;5;13:*.pbm=38;5;13:*.pgm=38;5;13:*.ppm=38;5;13:*.tga=38;5;13:*.xbm=38;5;13:*.xpm=38;5;13:*.tif=38;5;13:*.tiff=38;5;13:*.png=38;5;13:*.svg=38;5;13:*.svgz=38;5;13:*.mng=38;5;13:*.pcx=38;5;13:*.mov=38;5;13:*.mpg=38;5;13:*.mpeg=38;5;13:*.m2v=38;5;13:*.mkv=38;5;13:*.webm=38;5;13:*.ogm=38;5;13:*.mp4=38;5;13:*.m4v=38;5;13:*.mp4v=38;5;13:*.vob=38;5;13:*.qt=38;5;13:*.nuv=38;5;13:*.wmv=38;5;13:*.asf=38;5;13:*.rm=38;5;13:*.rmvb=38;5;13:*.flc=38;5;13:*.avi=38;5;13:*.fli=38;5;13:*.flv=38;5;13:*.gl=38;5;13:*.dl=38;5;13:*.xcf=38;5;13:*.xwd=38;5;13:*.yuv=38;5;13:*.cgm=38;5;13:*.emf=38;5;13:*.axv=38;5;13:*.anx=38;5;13:*.ogv=38;5;13:*.ogx=38;5;13:*.aac=38;5;45:*.au=38;5;45:*.flac=38;5;45:*.mid=38;5;45:*.midi=38;5;45:*.mka=38;5;45:*.mp3=38;5;45:*.mpc=38;5;45:*.ogg=38;5;45:*.ra=38;5;45:*.wav=38;5;45:*.axa=38;5;45:*.oga=38;5;45:*.spx=38;5;45:*.xspf=38;5;45:
|
||||
LD_LIBRARY_PATH=:/home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/lib/LINUX64:/home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/IUS/LINUX64/boot:/home/cadence/INCISIVE152/tools.lnx86/lib
|
||||
GNOME_TERMINAL_SERVICE=:1.105
|
||||
XNLSPATH=/home/synopsys/verdi/Verdi_O-2018.09-SP2/etc/access/nls
|
||||
LD_LIBRARY_PATH=/home/synopsys/vcs-mx/O-2018.09-1/linux64/lib::/home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/lib/LINUX64:/home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/IUS/LINUX64/boot:/home/cadence/INCISIVE152/tools.lnx86/lib:/home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/lib/LINUX64:/home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/IUS/LINUX64/boot:/home/cadence/INCISIVE152/tools.lnx86/lib
|
||||
SCRIPT_NAME=vcs
|
||||
MAKE_TERMOUT=/dev/pts/0
|
||||
SSH_AUTH_SOCK=/run/user/1000/keyring/ssh
|
||||
VCS_MX_HOME_INTERNAL=1
|
||||
DVE_HOME=/home/synopsys/vcs-mx/O-2018.09-1
|
||||
SNPSLMD_LICENSE_FILE=27000@IC_EDA
|
||||
USERNAME=ICer
|
||||
SESSION_MANAGER=local/unix:@/tmp/.ICE-unix/3690,unix/unix:/tmp/.ICE-unix/3690
|
||||
MAKELEVEL=1
|
||||
OVA_UUM=0
|
||||
MFLAGS=
|
||||
MMSIMHOME=/home/cadence/MMSIM151
|
||||
GNOME_SHELL_SESSION_MODE=classic
|
||||
DESKTOP_SESSION=gnome-classic
|
||||
PATH=/bin:/home/Xilinx/SDK/2019.1/bin:/home/Xilinx/SDK/2019.1/gnu/microblaze/lin/bin:/home/Xilinx/SDK/2019.1/gnu/arm/lin/bin:/home/Xilinx/SDK/2019.1/gnu/microblaze/linux_toolchain/lin64_le/bin:/home/Xilinx/SDK/2019.1/gnu/aarch32/lin/gcc-arm-linux-gnueabi/bin:/home/Xilinx/SDK/2019.1/gnu/aarch32/lin/gcc-arm-none-eabi/bin:/home/Xilinx/SDK/2019.1/gnu/aarch64/lin/aarch64-linux/bin:/home/Xilinx/SDK/2019.1/gnu/aarch64/lin/aarch64-none/bin:/home/Xilinx/SDK/2019.1/gnu/armr5/lin/gcc-arm-none-eabi/bin:/home/Xilinx/SDK/2019.1/tps/lnx64/cmake-3.3.2/bin:/home/Xilinx/Vivado/2019.1/bin:/home/Xilinx/DocNav:/usr/lib/qt-3.3/bin:/usr/local/bin:/usr/local/sbin:/usr/bin:/usr/sbin:/bin:/sbin:/home/synopsys/fpga/N-2018.03-SP1/bin:/home/synopsys/pts/O-2018.06-SP1/bin:/home/synopsys/icc2/O-2018.06-SP1/bin:/home/synopsys/syn/O-2018.06-SP1/bin:/home/synopsys/lc/O-2018.06-SP1/bin:/home/synopsys/SpyGlass-L2016.06/SPYGLASS_HOME//bin:/home/synopsys/vcs-mx/O-2018.09-1/gui/dve/bin:/home/synopsys/vcs-mx/O-2018.09-1/bin:/home/synopsys/verdi/Verdi_O-2018.09-SP2/bin:/home/synopsys/scl/2018.06/linux64/bin::/home/cadence/IC617/tools/dfII/bin:/home/cadence/IC617/tools/plot/bin:/home/cadence/INCISIVE152/tools/bin:/home/cadence/MMSIM151/bin:/home/cadence/MMSIM151/tools/relxpert/bin:/home/cadence/INCISIVE152/bin:/home/cadence/INCISIVE152/tools.lnx86/bin:/home/cadence/INCISIVE152/tools.lnx86/dfII/bin:/home/mentor/questasim/linux_x86_64:/home/Riscv_Tools/bin:/home/Riscv_Tools/riscv-gnu-toolchain/qemu-6.0.0/build/riscv32-linux-user
|
||||
VCS_MODE_FLAG=64
|
||||
PATH=.:/home/Xilinx/SDK/2019.1/bin:/home/Xilinx/SDK/2019.1/gnu/microblaze/lin/bin:/home/Xilinx/SDK/2019.1/gnu/arm/lin/bin:/home/Xilinx/SDK/2019.1/gnu/microblaze/linux_toolchain/lin64_le/bin:/home/Xilinx/SDK/2019.1/gnu/aarch32/lin/gcc-arm-linux-gnueabi/bin:/home/Xilinx/SDK/2019.1/gnu/aarch32/lin/gcc-arm-none-eabi/bin:/home/Xilinx/SDK/2019.1/gnu/aarch64/lin/aarch64-linux/bin:/home/Xilinx/SDK/2019.1/gnu/aarch64/lin/aarch64-none/bin:/home/Xilinx/SDK/2019.1/gnu/armr5/lin/gcc-arm-none-eabi/bin:/home/Xilinx/SDK/2019.1/tps/lnx64/cmake-3.3.2/bin:/home/Xilinx/Vivado/2019.1/bin:/home/Xilinx/DocNav:/home/ICer/.vscode-server/bin/8b3775030ed1a69b13e4f4c628c612102e30a681/bin/remote-cli:/home/Xilinx/SDK/2019.1/bin:/home/Xilinx/SDK/2019.1/gnu/microblaze/lin/bin:/home/Xilinx/SDK/2019.1/gnu/arm/lin/bin:/home/Xilinx/SDK/2019.1/gnu/microblaze/linux_toolchain/lin64_le/bin:/home/Xilinx/SDK/2019.1/gnu/aarch32/lin/gcc-arm-linux-gnueabi/bin:/home/Xilinx/SDK/2019.1/gnu/aarch32/lin/gcc-arm-none-eabi/bin:/home/Xilinx/SDK/2019.1/gnu/aarch64/lin/aarch64-linux/bin:/home/Xilinx/SDK/2019.1/gnu/aarch64/lin/aarch64-none/bin:/home/Xilinx/SDK/2019.1/gnu/armr5/lin/gcc-arm-none-eabi/bin:/home/Xilinx/SDK/2019.1/tps/lnx64/cmake-3.3.2/bin:/home/Xilinx/Vivado/2019.1/bin:/home/Xilinx/DocNav:/usr/lib/qt-3.3/bin:/usr/local/bin:/usr/bin:/home/synopsys/fpga/N-2018.03-SP1/bin:/home/synopsys/pts/O-2018.06-SP1/bin:/home/synopsys/icc2/O-2018.06-SP1/bin:/home/synopsys/syn/O-2018.06-SP1/bin:/home/synopsys/lc/O-2018.06-SP1/bin:/home/synopsys/SpyGlass-L2016.06/SPYGLASS_HOME//bin:/home/synopsys/vcs-mx/O-2018.09-1/gui/dve/bin:/home/synopsys/vcs-mx/O-2018.09-1/bin:/home/synopsys/verdi/Verdi_O-2018.09-SP2/bin:/home/synopsys/scl/2018.06/linux64/bin::/home/cadence/IC617/tools/dfII/bin:/home/cadence/IC617/tools/plot/bin:/home/cadence/INCISIVE152/tools/bin:/home/cadence/MMSIM151/bin:/home/cadence/MMSIM151/tools/relxpert/bin:/home/cadence/INCISIVE152/bin:/home/cadence/INCISIVE152/tools.lnx86/bin:/home/cadence/INCISIVE152/tools.lnx86/dfII/bin:/home/mentor/questasim/linux_x86_64:/home/Riscv_Tools/bin:/home/Riscv_Tools/riscv-gnu-toolchain/qemu-6.0.0/build/riscv32-linux-user:/usr/local/sbin:/usr/sbin:/home/synopsys/fpga/N-2018.03-SP1/bin:/home/synopsys/pts/O-2018.06-SP1/bin:/home/synopsys/icc2/O-2018.06-SP1/bin:/home/synopsys/syn/O-2018.06-SP1/bin:/home/synopsys/lc/O-2018.06-SP1/bin:/home/synopsys/SpyGlass-L2016.06/SPYGLASS_HOME//bin:/home/synopsys/vcs-mx/O-2018.09-1/gui/dve/bin:/home/synopsys/vcs-mx/O-2018.09-1/bin:/home/synopsys/verdi/Verdi_O-2018.09-SP2/bin:/home/synopsys/scl/2018.06/linux64/bin::/home/cadence/IC617/tools/dfII/bin:/home/cadence/IC617/tools/plot/bin:/home/cadence/INCISIVE152/tools/bin:/home/cadence/MMSIM151/bin:/home/cadence/MMSIM151/tools/relxpert/bin:/home/cadence/INCISIVE152/bin:/home/cadence/INCISIVE152/tools.lnx86/bin:/home/cadence/INCISIVE152/tools.lnx86/dfII/bin:/home/mentor/questasim/linux_x86_64:/home/Riscv_Tools/bin:/home/Riscv_Tools/riscv-gnu-toolchain/qemu-6.0.0/build/riscv32-linux-user
|
||||
MAIL=/var/spool/mail/ICer
|
||||
PT_HOME=/home/synopsys/pts/O-2018.06-SP1
|
||||
QT_IM_MODULE=ibus
|
||||
CALIBRE_HOME=/home/mentor//Calibre2015/aoi_cal_2015.2_36.27
|
||||
VERDI_HOME=/home/synopsys/verdi/Verdi_O-2018.09-SP2
|
||||
XDG_SESSION_TYPE=x11
|
||||
MGC_CALIBRE_LAYOUT_SERVER=IC_EDA:9189
|
||||
PWD=/home/ICer/ic_prjs/mc/IC_PRJ/sim
|
||||
XMODIFIERS=@im=none
|
||||
VCS_HOME=/home/synopsys/vcs-mx/O-2018.09-1
|
||||
SYS_PROG_NAME=verdi
|
||||
MGC_CALIBRE_SCHEMATIC_SERVER=IC_EDA:9199
|
||||
LANG=C
|
||||
GDM_LANG=zh_CN.UTF-8
|
||||
LANG=zh_CN.UTF-8
|
||||
KDEDIRS=/usr
|
||||
VCS_ARCH_OVERRIDE=linux
|
||||
LC_MEASUREMENT=zh_CN.UTF-8
|
||||
VSCODE_GIT_ASKPASS_EXTRA_ARGS=
|
||||
VMR_MODE_FLAG=64
|
||||
SELINUX_LEVEL_REQUESTED=
|
||||
CDSHOME=/home/cadence/IC617
|
||||
SYS_INST_DIR=/home/synopsys/verdi/Verdi_O-2018.09-SP2
|
||||
GDMSESSION=gnome-classic
|
||||
XILINX_VIVADO=/home/Xilinx/Vivado/2019.1
|
||||
QEMU_HOME=/home/Riscv_Tools/riscv-gnu-toolchain/qemu-6.0.0
|
||||
HISTCONTROL=ignoredups
|
||||
SPECMAN_HOME=/home/cadence/INCISIVE152/components/sn
|
||||
VCS_ARG_ADDED_FOR_TMP=1
|
||||
SNPS_VCS_TMPDIR=/tmp/vcs_20250813083055_5256
|
||||
HOME=/home/ICer
|
||||
XDG_SEAT=seat0
|
||||
RISCV=/home/Riscv_Tools
|
||||
SHLVL=3
|
||||
SHLVL=7
|
||||
VSCODE_GIT_ASKPASS_MAIN=/home/ICer/.vscode-server/bin/8b3775030ed1a69b13e4f4c628c612102e30a681/extensions/git/dist/askpass-main.js
|
||||
MGC_HOME=/home/mentor/
|
||||
ICC2_HOME=/home/synopsys/icc2/O-2018.06-SP1
|
||||
VERDI_ORIGNAL_LD_LIBRARY_PATH=:/home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/lib/LINUX64:/home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/IUS/LINUX64/boot:/home/cadence/INCISIVE152/tools.lnx86/lib
|
||||
MGC_LICENSE_FILE=/home/mentor//license/license.dat
|
||||
GNOME_DESKTOP_SESSION_ID=this-is-deprecated
|
||||
CADHOME=/home/cadence
|
||||
XDG_SESSION_DESKTOP=gnome-classic
|
||||
VCS_COM=/home/synopsys/vcs-mx/O-2018.09-1/linux64/bin/vcs1
|
||||
LOGNAME=ICer
|
||||
DC_HOME=/home/synopsys/syn/O-2018.06-SP1
|
||||
MGLS_LICENSE_FILE=/home/mentor/questasim/mentor.dat
|
||||
QTLIB=/usr/lib/qt-3.3/lib
|
||||
SPYGLASS_HOME=/home/synopsys/SpyGlass-L2016.06/SPYGLASS_HOME/
|
||||
MAKE_TERMERR=/dev/pts/0
|
||||
XDG_DATA_DIRS=/home/ICer/.local/share/flatpak/exports/share/:/var/lib/flatpak/exports/share/:/usr/local/share/:/usr/share/
|
||||
DBUS_SESSION_BUS_ADDRESS=unix:abstract=/tmp/dbus-LHuevZztAf,guid=55ddfa7976bc586b8b8ee131689354d9
|
||||
NOVASHLPPATH=/home/synopsys/verdi/Verdi_O-2018.09-SP2/doc
|
||||
SPS_RGB_PATH=/home/synopsys/verdi/Verdi_O-2018.09-SP2/etc/rgb
|
||||
XDG_DATA_DIRS=/home/ICer/.local/share/flatpak/exports/share:/var/lib/flatpak/exports/share:/usr/local/share:/usr/share
|
||||
SSH_CONNECTION=192.168.223.1 52776 192.168.223.129 22
|
||||
VSCODE_GIT_IPC_HANDLE=/run/user/1000/vscode-git-07cba0c96a.sock
|
||||
VSCODE_IPC_HOOK_CLI=/run/user/1000/vscode-ipc-e469d87e-6fcb-418d-9f59-455493644d33.sock
|
||||
CDS_LIC_FILE=/home/cadence/license/cadence.dat
|
||||
SPECMAN_DIR=/home/cadence/INCISIVE152/components/sn/
|
||||
LESSOPEN=||/usr/bin/lesspipe.sh %s
|
||||
BROWSER=/home/ICer/.vscode-server/bin/8b3775030ed1a69b13e4f4c628c612102e30a681/bin/helpers/browser.sh
|
||||
SCL_HOME=/home/synopsys/scl/2018.06
|
||||
WINDOWPATH=1
|
||||
LD_NOVERSION=1
|
||||
sysc_uni_pwd=/home/ICer/ic_prjs/mc/IC_PRJ/sim
|
||||
VSCODE_GIT_ASKPASS_NODE=/home/ICer/.vscode-server/bin/8b3775030ed1a69b13e4f4c628c612102e30a681/node
|
||||
GIT_ASKPASS=/home/ICer/.vscode-server/bin/8b3775030ed1a69b13e4f4c628c612102e30a681/extensions/git/dist/askpass.sh
|
||||
XDG_RUNTIME_DIR=/run/user/1000
|
||||
SYNPLIFY_HOME=/home/synopsys/fpga/N-2018.03-SP1
|
||||
DISPLAY=:0
|
||||
QT_PLUGIN_PATH=/home/synopsys/verdi/Verdi_O-2018.09-SP2/platform/LINUXAMD64/lib/Qt/plugins
|
||||
VCS_ARCH=linux64
|
||||
QT_PLUGIN_PATH=/usr/lib64/kde4/plugins:/usr/lib/kde4/plugins
|
||||
LC_HOME=/home/synopsys/lc/O-2018.06-SP1
|
||||
XDG_CURRENT_DESKTOP=GNOME-Classic:GNOME
|
||||
TOOL_HOME=/home/synopsys/vcs-mx/O-2018.09-1/linux64
|
||||
INCISIVE_HOME=/home/cadence/INCISIVE152
|
||||
LC_TIME=zh_CN.UTF-8
|
||||
XAUTHORITY=/run/gdm/auth-for-ICer-JLN4Y3/database
|
||||
COLORTERM=truecolor
|
||||
PS_HWPC=OFF
|
||||
NOVAS_LC_ALL=C
|
||||
NOVAS_SIGNAL_BASE_EXTRACTION=1
|
||||
SIGNAL_BASE_EXTRACTION=1
|
||||
NOVAS_VERDI_SVTB_BETA=1
|
||||
VERDI_SVTB_BETA=1
|
||||
NOVAS_VERDI_SVTB_ALPHA=1
|
||||
VERDI_SVTB_ALPHA=1
|
||||
NOVAS_VERDI_TB_HT=1
|
||||
VERDI_TB_HT=1
|
||||
NOVAS_WAVE_REDRAW_ALLVC=1
|
||||
WAVE_REDRAW_ALLVC=1
|
||||
NOVAS_TCL_LIBRARY=/home/synopsys/verdi/Verdi_O-2018.09-SP2/etc/access/tcl86_library
|
||||
TCL_LIBRARY=/home/synopsys/verdi/Verdi_O-2018.09-SP2/etc/access/tcl86_library
|
||||
XKEYSYMDB=/home/synopsys/verdi/Verdi_O-2018.09-SP2/etc/access/XKeysymDB2.1
|
||||
XLOCALEDIR=/home/synopsys/verdi/Verdi_O-2018.09-SP2/etc/access/locale
|
||||
NOVAS_SIGNAL_BASED_BA=0
|
||||
SIGNAL_BASED_BA=0
|
||||
SYNOPSYS_SIM=/home/synopsys/vcs-mx/O-2018.09-1
|
||||
DISABLE_LIBRARY_MAP_CHECK=1
|
||||
SNPS_SIM_DEFAULT_GUI=verdi
|
||||
FSDB_FILE=/home/ICer/ic_prjs/mc/IC_PRJ/sim/inter.fsdb
|
||||
VCS_UCLI_STDIN_BLOCKING=1
|
||||
FSDB_VHDL_PROTECTED=1
|
||||
FSDB_RD_IR_ENABLE=1
|
||||
FSDB_SVA_STATUS=1
|
||||
_=./simv
|
||||
OLDPWD=/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv.daidir/debug_dump/fsearch
|
||||
VCS_HEAP_EXEC=true
|
||||
VCS_PATHMAP_PRELOAD_DONE=1
|
||||
VCS_STACK_EXEC=true
|
||||
VCS_EXEC_DONE=1
|
||||
VCS_STOP_SAFE=1
|
||||
DVE_SIM_SELECT_LOOP=on
|
||||
DVE=/home/synopsys/vcs-mx/O-2018.09-1/gui/dve
|
||||
SPECMAN_OUTPUT_TO_TTY=1
|
||||
Runtime command line arguments:
|
||||
argv[0]=/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv
|
||||
argv[1]=-sml=verdi
|
||||
argv[2]=+fsdb+gate=off
|
||||
argv[3]=-ucli2Proc
|
||||
argv[4]=-ucli
|
||||
argv[5]=-l
|
||||
argv[6]=/home/ICer/ic_prjs/mc/IC_PRJ/sim/verdiLog/sim.log
|
||||
317 profile - 100
|
||||
CPU/Mem usage: 0.030 sys, 0.110 user, 236.15M mem
|
||||
318 Wed Aug 6 22:32:55 2025
|
||||
319 pliAppInit
|
||||
320 ndpGetenv(FSDB_FILE): /home/ICer/ic_prjs/mc/IC_PRJ/sim/inter.fsdb
|
||||
321 ndpGetenv(FSDB_SVA_STATUS): 1
|
||||
322 ndpGetenv(FSDB_VHDL_PROTECTED): 1
|
||||
323 FSDB_GATE & FSDB_RTL is disabled.
|
||||
324 Enable Parallel Dumping.
|
||||
325 pliAppMiscSet: New Sim Round
|
||||
326 pliEntryInit
|
||||
327 LIBSSCORE=found /home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/lib/LINUXAMD64/libsscore_vcs201809.so through $NOVAS_HOME setting.
|
||||
328 FSDB Dumper for VCS, Release Verdi_O-2018.09-SP2, Linux x86_64/64bit, 02/21/2019
|
||||
329 (C) 1996 - 2019 by Synopsys, Inc.
|
||||
330 sps_tcl_fsdbDumpfile_main at 0
|
||||
331 argv[0]: /home/ICer/ic_prjs/mc/IC_PRJ/sim/inter.fsdb
|
||||
332 *Verdi* : Create FSDB file '/home/ICer/ic_prjs/mc/IC_PRJ/sim/inter.fsdb'
|
||||
333 compile option from '/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv.daidir/vcs_rebuild'.
|
||||
334 "vcs '-f' 'filelist.f' '-timescale=1ns/1ps' '-full64' '-R' '+vc' '+v2k' '-sverilog' '-debug_access+all' 2>&1"
|
||||
335 sps_tcl_fsdbDumpflush_vd_main
|
||||
336 *Verdi* : Flush all FSDB Files at 0 ps.
|
||||
337 FSDB_VCS_ENABLE_FAST_VC is enable
|
||||
338 sps_tcl_fsdbDumpvarsByFile_vd_main at 0 : N/A(0)
|
||||
339 *Verdi* : Begin dumping the scopes by file (/home/ICer/ic_prjs/mc/IC_PRJ/sim/verdiLog/.tbsimDump_var_file).
|
||||
340 [spi_vcs_vd_ppi_create_root]: no upf option
|
||||
341 FSDB dumper cannot dump UPF related power signal ($power_tree): no ppiPowerNetwork.
|
||||
342 pliAppHDL_DumpVarComplete traverse var: profile -
|
||||
CPU/Mem usage: 0.110 sys, 0.110 user, 329.39M mem
|
||||
incr: 0.000 sys, 0.000 user, 2.65M mem
|
||||
accu: 0.000 sys, 0.000 user, 2.65M mem
|
||||
accu incr: 0.000 sys, 0.000 user, 2.65M mem
|
||||
argv[0]=simv
|
||||
argv[1]=+vc
|
||||
argv[2]=+v2k
|
||||
271 profile - 100
|
||||
CPU/Mem usage: 0.920 sys, 0.370 user, 245.56M mem
|
||||
272 Wed Aug 13 16:31:00 2025
|
||||
273 pliAppInit
|
||||
274 FSDB_GATE is set.
|
||||
275 FSDB_RTL is set.
|
||||
276 Enable Parallel Dumping.
|
||||
277 pliAppMiscSet: New Sim Round
|
||||
278 pliEntryInit
|
||||
279 LIBSSCORE=found /home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/lib/LINUXAMD64/libsscore_vcs201809.so through $NOVAS_HOME setting.
|
||||
280 FSDB Dumper for VCS, Release Verdi_O-2018.09-SP2, Linux x86_64/64bit, 02/21/2019
|
||||
281 (C) 1996 - 2019 by Synopsys, Inc.
|
||||
282 sps_call_fsdbDumpfile_main at 0 : ../tb/tb_array_ctrl.v(212)
|
||||
283 argv[0]: (tb.fsdb)
|
||||
284 *Verdi* : Create FSDB file 'tb.fsdb'
|
||||
285 compile option from '/home/ICer/ic_prjs/mc/IC_PRJ/sim/simv.daidir/vcs_rebuild'.
|
||||
286 "vcs '-f' 'filelist.f' '-timescale=1ns/1ps' '-full64' '-R' '+vc' '+v2k' '-sverilog' '-debug_access+all' 2>&1"
|
||||
287 FSDB_VCS_ENABLE_FAST_VC is enable
|
||||
288 sps_call_fsdbDumpvars_vd_main at 0 : ../tb/tb_array_ctrl.v(213)
|
||||
289 argv[0]: (0)
|
||||
290 argv[1]: (handle) tb_array_ctrl
|
||||
291 argv[2]: (+all)
|
||||
292 [spi_vcs_vd_ppi_create_root]: no upf option
|
||||
293 FSDB dumper cannot dump UPF related power signal ($power_tree): no ppiPowerNetwork.
|
||||
294 *Verdi* : Begin traversing the scope (tb_array_ctrl), layer (0).
|
||||
295 *Verdi* : Enable +all dumping.
|
||||
296 *Verdi* : End of traversing.
|
||||
297 pliAppHDL_DumpVarComplete traverse var: profile -
|
||||
CPU/Mem usage: 1.570 sys, 0.370 user, 342.00M mem
|
||||
incr: 0.060 sys, 0.000 user, 8.61M mem
|
||||
accu: 0.060 sys, 0.000 user, 8.61M mem
|
||||
accu incr: 0.060 sys, 0.000 user, 8.61M mem
|
||||
|
||||
Count usage: 44 var, 44 idcode, 44 callback
|
||||
incr: 44 var, 44 idcode, 44 callback
|
||||
accu: 44 var, 44 idcode, 44 callback
|
||||
accu incr: 44 var, 44 idcode, 44 callback
|
||||
343 Wed Aug 6 22:32:57 2025
|
||||
344 pliAppHDL_DumpVarComplete: profile -
|
||||
CPU/Mem usage: 0.110 sys, 0.110 user, 330.44M mem
|
||||
Count usage: 221 var, 140 idcode, 71 callback
|
||||
incr: 221 var, 140 idcode, 71 callback
|
||||
accu: 221 var, 140 idcode, 71 callback
|
||||
accu incr: 221 var, 140 idcode, 71 callback
|
||||
298 Wed Aug 13 16:31:01 2025
|
||||
299 pliAppHDL_DumpVarComplete: profile -
|
||||
CPU/Mem usage: 1.570 sys, 0.370 user, 343.05M mem
|
||||
incr: 0.000 sys, 0.000 user, 1.05M mem
|
||||
accu: 0.000 sys, 0.000 user, 3.70M mem
|
||||
accu: 0.060 sys, 0.000 user, 9.66M mem
|
||||
accu incr: 0.000 sys, 0.000 user, 1.05M mem
|
||||
|
||||
Count usage: 44 var, 44 idcode, 44 callback
|
||||
Count usage: 221 var, 140 idcode, 71 callback
|
||||
incr: 0 var, 0 idcode, 0 callback
|
||||
accu: 44 var, 44 idcode, 44 callback
|
||||
accu: 221 var, 140 idcode, 71 callback
|
||||
accu incr: 0 var, 0 idcode, 0 callback
|
||||
345 Wed Aug 6 22:32:57 2025
|
||||
346 *Verdi* : End of dumping.
|
||||
347 fsdbDumpvarsByFile: profile -
|
||||
CPU/Mem usage: 0.110 sys, 0.110 user, 330.44M mem
|
||||
incr: 0.000 sys, 0.000 user, 3.70M mem
|
||||
accu: 0.000 sys, 0.000 user, 3.70M mem
|
||||
accu incr: 0.000 sys, 0.000 user, 3.70M mem
|
||||
|
||||
Count usage: 44 var, 44 idcode, 44 callback
|
||||
incr: 44 var, 44 idcode, 44 callback
|
||||
accu: 44 var, 44 idcode, 44 callback
|
||||
accu incr: 44 var, 44 idcode, 44 callback
|
||||
348 Wed Aug 6 22:32:57 2025
|
||||
349 sps_tcl_fsdbDumpflush_vd_main
|
||||
350 *Verdi* : Flush all FSDB Files at 0 ps.
|
||||
351 sps_tcl_fsdbDumpflush_vd_main
|
||||
352 *Verdi* : Flush all FSDB Files at 0 ps.
|
||||
353 sps_tcl_fsdbDumpflush_vd_main
|
||||
354 *Verdi* : Flush all FSDB Files at 0 ps.
|
||||
355 sps_call_fsdbDumpfile_main at 0 : ../tb/tb_rchannel.v(98)
|
||||
356 argv[0]: (tb.fsdb)
|
||||
357 sps_call_fsdbDumpvars_vd_main at 0 : ../tb/tb_rchannel.v(99)
|
||||
358 argv[0]: (0)
|
||||
359 argv[1]: (handle) tb_rchannel
|
||||
360 argv[2]: (+all)
|
||||
361 *Verdi* : Begin traversing the scope (tb_rchannel), layer (0).
|
||||
362 *Verdi* : Enable +all dumping.
|
||||
363 *Verdi* : End of traversing.
|
||||
364 pliAppHDL_DumpVarComplete traverse var: profile -
|
||||
CPU/Mem usage: 0.120 sys, 0.110 user, 333.21M mem
|
||||
incr: 0.000 sys, 0.000 user, 1.05M mem
|
||||
accu: 0.000 sys, 0.000 user, 1.05M mem
|
||||
accu incr: 0.000 sys, 0.000 user, 1.05M mem
|
||||
|
||||
Count usage: 159 var, 85 idcode, 72 callback
|
||||
incr: 115 var, 41 idcode, 28 callback
|
||||
accu: 115 var, 41 idcode, 28 callback
|
||||
accu incr: 115 var, 41 idcode, 28 callback
|
||||
365 Wed Aug 6 22:32:59 2025
|
||||
366 pliAppHDL_DumpVarComplete: profile -
|
||||
CPU/Mem usage: 0.130 sys, 0.110 user, 333.21M mem
|
||||
incr: 0.010 sys, 0.000 user, 0.00M mem
|
||||
accu: 0.010 sys, 0.000 user, 1.05M mem
|
||||
accu incr: 0.010 sys, 0.000 user, 0.00M mem
|
||||
|
||||
Count usage: 159 var, 85 idcode, 72 callback
|
||||
incr: 0 var, 0 idcode, 0 callback
|
||||
accu: 115 var, 41 idcode, 28 callback
|
||||
accu incr: 0 var, 0 idcode, 0 callback
|
||||
367 Wed Aug 6 22:32:59 2025
|
||||
368 sps_tcl_fsdbDumpflush_vd_main
|
||||
369 *Verdi* : Flush all FSDB Files at 365,000 ps.
|
||||
370 End of simulation at 365000
|
||||
371 Wed Aug 6 22:41:15 2025
|
||||
372 Begin FSDB profile info:
|
||||
373 FSDB Writer : bc1(202) bcn(288) mtf/stf(0/5)
|
||||
FSDB Writer elapsed time : flush(0.014706) io wait(0.000000) theadpool wait(0.000000) target functin(0.000000)
|
||||
300 Wed Aug 13 16:31:01 2025
|
||||
301 End of simulation at 3648750
|
||||
302 Wed Aug 13 16:31:01 2025
|
||||
303 Begin FSDB profile info:
|
||||
304 FSDB Writer : bc1(3057) bcn(590) mtf/stf(0/0)
|
||||
FSDB Writer elapsed time : flush(0.034176) io wait(0.000000) theadpool wait(0.000000) target functin(0.000000)
|
||||
FSDB Writer cpu time : MT Compression : 0
|
||||
374 End FSDB profile info
|
||||
375 Parallel profile - Flush:10 Expand:0 ProduceWait:0 ConsumerWait:0 BlockUsed:0
|
||||
376 ProduceTime:0.262536335 ConsumerTime:0.000000000 Buffer:64MB
|
||||
377 SimExit
|
||||
378 Sim process exit
|
||||
305 End FSDB profile info
|
||||
306 Parallel profile - Flush:3 Expand:0 ProduceWait:0 ConsumerWait:0 BlockUsed:0
|
||||
307 ProduceTime:2.059042140 ConsumerTime:0.000000000 Buffer:64MB
|
||||
308 SimExit
|
||||
309 Sim process exit
|
||||
|
||||
Reference in New Issue
Block a user