cache module
This commit is contained in:
Core_kingdom
350
sim/csrc/cginfo.json
Normal file
350
sim/csrc/cginfo.json
Normal file
@@ -0,0 +1,350 @@
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1
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"CompileStatus": "Successful",
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"SIMBData": {
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"out": "amcQwB.o",
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"text": 0,
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"archive": "archive.0/_16331_archive_1.a"
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},
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"LVLData": [
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"CompileProcesses": [
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],
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"incremental": "on",
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"CurCompileModules": [
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"...MASTER...",
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"...MASTER...",
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"std",
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"std",
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"tb_data_cache",
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"Misc": {
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"vcs_version": "O-2018.09-1_Full64",
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"vcs_build_date": "Build Date = Oct 12 2018 20:38:10",
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"master_pid": 16331,
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"VCS_HOME": "/home/synopsys/vcs-mx/O-2018.09-1",
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"cwd": "/home/ICer/ic_prjs/IPA/sim",
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"csrc": "csrc",
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"default_output_dir": "csrc",
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"hostname": "IC_EDA",
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"csrc_abs": "/home/ICer/ic_prjs/IPA/sim/csrc",
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"archive_dir": "archive.0",
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"daidir": "simv.daidir",
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"daidir_abs": "/home/ICer/ic_prjs/IPA/sim/simv.daidir"
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}
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}
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