`timescale 1ns/1ps module tb_data_assemble(); // 参数定义 parameter PIXEL_WIDTH = 8; parameter GRAY_PIXEL_CNT = 32; parameter RGB_PIXEL_CNT = 8; // 信号定义 reg clk; reg rst_n; reg en; reg input_pixel_type; reg [PIXEL_WIDTH-1:0] ir_ch0; reg [PIXEL_WIDTH-1:0] ir_ch1; reg [PIXEL_WIDTH-1:0] ir_ch2; reg pixel_valid; wire done; wire [255:0] assembled_data; // 生成时钟(100MHz) initial begin clk = 1'b0; forever #5 clk = ~clk; end // 实例化DUT data_assemble #( .PIXEL_WIDTH (PIXEL_WIDTH), .GRAY_PIXEL_CNT (GRAY_PIXEL_CNT), .RGB_PIXEL_CNT (RGB_PIXEL_CNT) ) u_data_assemble ( .clk (clk), .rst_n (rst_n), .en (en), .input_pixel_type(input_pixel_type), .ir_ch0 (ir_ch0), .ir_ch1 (ir_ch1), .ir_ch2 (ir_ch2), .pixel_valid (pixel_valid), .done (done), .assembled_data (assembled_data) ); // 生成FSDB波形 initial begin $fsdbDumpfile("tb.fsdb"); $fsdbDumpvars(0, tb_data_assemble); $fsdbDumpMDA(0, tb_data_assemble); end // 测试场景 initial begin // 初始化 rst_n = 1'b0; en = 1'b0; input_pixel_type = 1'b0; ir_ch0 = 8'd0; ir_ch1 = 8'd0; ir_ch2 = 8'd0; pixel_valid = 1'b0; // 释放复位 #20; rst_n = 1'b1; #20; // -------------------------- 测试1:Gray模式拼接 -------------------------- $display("[%0t] Test 1: Gray mode assembly", $time); input_pixel_type = 1'b0; en = 1'b1; #10; // 输入32个数据(0x01~0x20) repeat (GRAY_PIXEL_CNT) begin @(posedge clk); pixel_valid = 1'b1; ir_ch0 = ir_ch0 + 8'd1; // 最后一个数据为0x20 end @(posedge clk); pixel_valid = 1'b0; wait(done == 1'b1); #10; // 验证首8bit(0x01)和尾8bit(0x20) $display("[%0t] Gray first 8bit: 0x%0h (Expected: 0x1)", $time, assembled_data[255:248]); $display("[%0t] Gray last 8bit: 0x%0h (Expected: 0x20)", $time, assembled_data[7:0]); #20; // -------------------------- 测试2:RGB模式拼接 -------------------------- $display("[%0t] Test 2: RGB mode assembly", $time); input_pixel_type = 1'b1; ir_ch0 = 8'd0; ir_ch1 = 8'd0; ir_ch2 = 8'd0; #10; // 输入8组数据:CH0=10*N, CH1=20*N, CH2=30*N(N=1~8) repeat (RGB_PIXEL_CNT) begin @(posedge clk); pixel_valid = 1'b1; ir_ch0 = ir_ch0 + 8'd10; // 10,20,...,80(0x0a,0x14,...,0x50) ir_ch1 = ir_ch1 + 8'd20; // 20,40,...,160(0x14,0x28,...,0xa0) ir_ch2 = ir_ch2 + 8'd30; // 30,60,...,240(0x1e,0x3c,...,0xf0) end @(posedge clk); pixel_valid = 1'b0; wait(done == 1'b1); #10; // 验证首32bit({8'd0,30,20,10}=0x00_1e_14_0a)和尾32bit({8'd0,240,160,80}=0x00_f0_a0_50) $display("[%0t] RGB first 32bit: 0x%08h (Expected: 0x001e140a)", $time, assembled_data[255:224]); $display("[%0t] RGB last 32bit: 0x%08h (Expected: 0x00f0a050)", $time, assembled_data[31:0]); #20; // -------------------------- 测试3:关闭使能 -------------------------- $display("[%0t] Test 3: Disable assembly", $time); en = 1'b0; input_pixel_type = 1'b0; @(posedge clk); pixel_valid = 1'b1; ir_ch0 = 8'd1; @(posedge clk); pixel_valid = 1'b0; #10; $display("[%0t] Disable check: done=%b (Expected:0)", $time, done); #20; $display("[%0t] All tests completed!", $time); $finish; end endmodule